资源列表
zhuan
- 一个关于串并和并串转换的verilog的工程，代码简洁易懂-this is a sample program project for transformation
test
- 另外一种自动售货机的状态机实现，跟前一个相比，简化了代码，运行效率高-this is another program for automachine
CAN
- uC/os2 stm32 103V Source IAR Compalier and Keil Gooybay
diodesbrightness--decline
- 依次是八个二极管亮度减小，用于信号的传递-Followed by reducing the brightness of eight diodes for signal transmission
modelsim
- 一个用于modelsim软件的激活的license，放置于相应的安装目录下即可-this is a license for modelsim Software
MP3
- * Descr iption : This is the standard entry point for C code. It is assumed that your code will call * main() once you have performed all necessary initialization.- * Descr iption : This is the standard entry point for C code. It is assumed t
U_Disk_128M
- account after checking your files. If you do not want to upload source
RS232
- PC机与RS232串口实验，有你想要的一些东西-A PC with RS232 serial experiments, there' s something you want
44key-pad
- 用verilog hdl语言实现4*4键盘扫描的小程序-With the verilog hdl language 4* 4 keyboard scan applet
i2c_verilog
- 该源程序包是I2C的Verilog语言模型，包括以下3个部分：document,source,testfixture。-The source package is the I2C Verilog language models, including the following three parts: document, source, testfixture.
download
- Download Instructions Linux
LCD
- lcd program for xmega