资源列表
xinhao
- 用来实现快速傅里叶变换FFt和卷积的计算。-Used to implement the fast Fourier transform the FFt and convolution calculation.
AM_restored
- DDS正弦信号生成，可以用于生成正弦信号，实现调制。-DDS sine signal generator can be used to generate sine signal modulation.
Hide-windows-ce-taskbar
- 用visual basic 2003 隐藏windows ce 任务栏-Hide windows ce taskbar
2407
- DSP例程，基于TMS320LF2407，包含ADC、CAN、FFT、LCD、key、PWM、RTC等18个常用例程，这些例程基于TI的CCS开发环境-DSP routines, based on the commonly used routines TMS320LF2407, including the ADC, CAN, the FFT, the LCD, the key, the PWM, the RTC 18, the routines are based on TI' s CCS
uart
- DSP实用例程，基于DSP C2000系列串口通信程序例程，开发环境基于ccs-Practical DSP routines, DSP C2000 series serial communication routine, the development environment is based on the ccs
5000test
- DSP c5000系列例程，入门例子，基于C5000系列和CCS开发环境的13个常用例程-DSP c5000 series of routines, entry example, C5000 Series and CCS development environment of 13 commonly used routines
time-of-clock
- 单片机中实现一个时钟的代码可以设置定时时间，-dan pian ji zhong shi xian yige shi zhong de daim a
AD
- 程序实现A/D转换功能，A/D采用中断方式-Program to achieve the A/D conversion, the A/D interrupt
libsrc
- linux 下面动态库和静态库的生成和使用实例，含有makefile-linux the following dynamic libraries and static libraries for creating and using instance contains a makefile
verilog(pdf)
- 北京大学微电子系的verilog课程讲义，pdf格式，非常经典。-the course outline of verilog course in Peking University.
avrusbboot
- avr通用上位机程序，实现串口烧录程序，下载代码，硬件升级-the avr general-purpose host computer program, the serial burning program, download the code, hardware upgrades
System_Verilog_for_Verification
- System Verilog for Verification