资源列表
separatefreq
- 采用VHDL设计分频程序，许多设计中都会用到对时钟信号进行分频-Using VHDL design to divide the program, many of the design will be used to divide the clock signal
ln-function
- 利用VHDL编写ln(1+x)这样的特殊函数逼近程序，采用Quartus 仿真-Writing the ln (1+x) special function approximation procedures using VHDL simulation with Quartus
4-2switch
- 四位拨妞开关作为输入，当输入值变化时将其转化成两位输出-The four DIP Niu switch as an input, when the input value changes, be converted into two output
yinpine2
- 基于NIOS2的VGA接口IP核，具有很好的借鉴性和参考性-NIOS VGA IP
can_stm32
- Stm32f103xx Can driver
fifo
- fifo buffer on template
liushuidengchenxi
- 这个是单片机实现流水灯的程序，可以自己该P口 -This is the realization of single-chip light water programs, can own the P export
rlarm
- The RL-ARM™ User s Guide contains detailed information about the components of the RealView® Real-Time Library (RL-ARM)-The RL-ARM™ User s Guide contains detailed information about the components of the RealView® Real-Time Library (
SPI_MSD
- STM32F051的SPI使用程序，使用库函数版本，可以快速上手SPI的开发-The STM32F051 SPI using the program, using the library function version, you can quickly get started the development of the SPI
ADC_DMA
- STM32F51的ADC采集使用案例，使用DMA方式快速采集模拟量。-STM32F51 the ADC collected use cases, use DMA mode rapid acquisition of analog.
msp430x20x3_sd16A_01_with_trap_ISR
- MSP430F20x3 Demo - SD16A, Sample A1+ Continuously, Set P1.0 if > 0.3V // // Descr iption: A continuous single-ended sample is made on A1+ using internal // VRef Unipolar output format used. // Inside of SD16 ISR, if A1 > 1/2VRef (0.3V),
analogcc
- analog clock with good graphics design