资源列表
CapTouch_BoosterPack_UserExperience
- TI MSP430launchPAD 触摸板源代码-TI MSP430launchPAD C source
ADC_ADC1_DMA
- STM32 ADC 利用DMA读写数据，简单的例子。-STM32 ADC DMA read and write data, a simple example.
WWDG
- STM32 的看门狗WWDG 简明例程源代码工程-The STM32' s the watchdog WWDG condensed routines source code project
COTEXM0
- COTEXM0例程，用得着的人下载哈 COTEXM0 EXAMPLE CODE-COTEXM0 EXAMPLE CODE COTEXM0例程，用得着的人下载哈
GPS-V2-module-tests-(ARM9)
- GPS 模块的测试程序，GPS V2模块在ARM9环境下输出导航信息。-GPS module test procedures
GPS-V2-modul-tests-(51)
- GPS V2 模块的51单片机测试程序，在单片机环境下输出并显示导航信息-GPS V2 module 51 MCU test program
LCD1602
- 基于FPGA EPM1270芯片设置的LCD1602液晶显示，已通过测试，显示完全正常，引脚已配好，下载直接使用-Based on the FPGA EPM1270 chip set LCD1602 liquid crystal display, has passed the test, showed completely normal, pins have been matched, downloaded directly use
libpciaccess-0.13.1.tar
- pciaccess库源码，可编译生成libpciaccess动态库。PCI总线的地址总线与数据总线是分时复用的，支持即插即用 （plug and play）、中断共享等功能。分时复用的好处是一方面可以节省接插件的引脚数，另一方面便于实现突发数据传输。-pciaccess library source code, can be compiled to generate libpciaccess dynamic library. The address bus and data bus of the
8-SEG-LED-Board
- 基于FPGA的EPM 1270芯片开发板的8 SEG LED Board Verilog程序，已通过测试，能正常使用，引脚已配好。-Based the EPM 1270 chip FPGA development board 8 SEG LED Board Verilog program has been tested normal use, the pin with a good.
PWM
- 基于FPGA EPM1270芯片板子的PWM程序，已通过测试，正常使用，引脚已配好-PWM program based on FPGA EPM1270 chip board, has been tested, and normal use, the pin with a good
VGA
- 基于FPGA EPM1270芯片的VGA Verilog显示程序，已测试，完全正常使用，引脚已配好-VGA Verilog FPGA EPM1270 chip-based display program, test, and completely normal use, the pin with a good
JOYSTICK
- 基于FPGA EPM1270芯片的JOYSTICK程序，使用Verilog编写，能正常使用，引脚已配好-, Use the JOYSTICK program based on FPGA EPM1270 chip in Verilog, normal use, the pin with a good