资源列表
SRC
- 清华大学光子电子实验室所用设备主控单元源代码，c51 ,包括触摸屏，键盘，232通讯，1-n系统，8051f-Tsinghua photon electronic laboratory equipment used in the main control unit source code, c51, including a touch screen, keyboard, 232, 1-n system, 8051f
7-segment-counter
- 7 segment counter in VHdl-7 segment counter in VHdl
crc16_d8
- 此代码采用Verilog语言实现8位CRC校验功能，采用CRC-ITU标准制定的CRC16校验-This code USES the Verilog language function of eight CRC check the CRC- ITU CRC16 calibration standards
ATT7022E
- ATT7022C的C语言程序，包含测量和校准程序-C ATT7022C language program, including measurement and calibration
DS1302
- DS1302的C51程序，包含配置和模拟I2C-C51 DS1302 procedures, including the configuration and simulation I2C
HT16C23
- 合泰HT16C23的C51程序，包含测试和模拟I2C-Thailand HT16C23 C51 procedures, including test and Simulation of I2C
I2C
- 基于NEC 0UPD78F0513单片机模拟的I2C程序-UPD78F0513 NEC microcontroller based on Simulation of the I2C program
TM1620
- 基于NEC UPD78F0513的TM1620驱动程序，模拟SPI-UPD78F0513 NEC based on the TM1620 driver, simulation SPI
colorchecker
- coloecheck VGA格式标准色卡生成，可支持任意分辨率设置 verilog-colorchecker VGA format standard color card production, can support any resolution settings
main
- LPC1700GPIO的中断，可以简单参考参考。-the interrput of LPC1700GPIO ,you can look for help it if you need.
gtx_interface_ip
- 高速串行设计FPGA-GTX IP设置生成，可动态配置速率2.4Gbps，1.2Gbps，0.6Gbps，自适应链接-High-speed serial design FPGA-GTX IP settings generated dynamically configurable rate of 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link
gtx_drp
- 高速串行设计FPGA-GTX IP设置生成drp模块，可动态配置速率2.4Gbps，1.2Gbps，0.6Gbps，自适应链接-High-speed serial design FPGA-GTX IP setting generation drp module, dynamically configurable rate 2.4Gbps, 1.2Gbps, 0.6Gbps, adaptive link