资源列表
CLOCK
- 实现电子钟，连接数码管显示，手写原创，使用CYCLONE V ，已经验证成功，附上工程文件-Implement electronic clock, use CYCLONE V, has been successfully verified, attach the project file
LSD
- 用VHDL语言写的流水灯，适用于最新的CYCLONE V 实验环境，工程文件附上，管脚分配已经完成。需要实验书可联系2942551049@qq.com-VHDL language used to write the water lights for the latest CYCLONE V test environment, engineering documents attached, pin assignment has been completed. Experiments need to
FPGA_exp2
- 调节数码管显示的文件，适用于CYCLONE II 开发板， 用VHDL语言编写，非常适合移植进数字钟中以实现调节时间的功能。 多模块设计简单明了。-Adjust digital display files for CYCLONE II development board, using VHDL language, it is very suitable for transplantation into digital clock to realize the function of regula
VGA
- VGA显示彩条，作为调试VGA接口的小程序。完整工程奉上。-VGA display color bars as small debugging VGA connector. Complete engineering offer.
RC_A7159_x0_470-510MHz-Band-Ref
- 获得IPC的信息，可以根据IP地址决定是否增加设备-Based on the official A7159 wireless transmission code routines
SCH_51_A
- 单片机测电阻电容原理图 硬件原理图 555振荡原理 通过测频换算对应的电阻电容值-Single Chip Microcomputer measured resistance and capacitance schematic hardware schematic diagram 555 oscillation principle by frequency conversion corresponding to the resistance and capacitance value
SCH_51_B
- 51单片机控制自动窗帘模拟电路，有时钟、存储器、驱动等，仅有硬件设计！-51 single-chip control automatic curtains analog circuits, clock, memory, drive, etc., only hardware design!
SCH_51_C
- 单片机控制ESP8266硬件设计，包含液晶等的链接方式，单片机采用STC15系列！-SCM control ESP8266 hardware design, including LCD and other links, single-chip STC15 series!
SCH_51_D
- 51单片机设计的数控电压源原理图，包含电源设计，DA部分、运放输出部分！-51 single-chip design of the numerical control voltage source schematic diagram, including power supply design, DA part, op amp output part!
SCH_51_E
- 采用32位单片机控制BOost电路升压，此电路为主控回路，非常有用！-32-bit single-chip control BOost circuit boost, the circuit for the main control loop, very useful!
uart_test_main
- Linux下的uart测试，验证串口通路是否正常。-Uart test under Linux, validation of serial circuit is normal.
stm32_UCOS-II
- ucos 移植于STM32,并成工运行。 -ucos 移植于STM32