资源列表
DULG-yellowstone
- 社区经典的powerpc处理器的uboot开发指南(The uboot Development Guide for the community classic PowerPC processor)
RGB_LED_STM32
- MORE EXAMPLE FOR WS2812
band_filter_main
- 频分多路复用滤波器，将多路基带信号调制到不同频率载波上再进行叠加形成一个复合信号(a Frequency Division multiplexer.)
main
- 串口通讯主机程序，主机发送字节，等待从机响应，附带crc 校验(USART communication routines of master board)
pinInterrupt
- CC2640通用编译文件，直接修改，简单好用(CC2640 general compiled file)
GISS_Divergence_Meter1
- 基于STM32F103C8T6的8位辉光管（11X锁存）的DS3231时钟模块驱动程序(Eight bit glow tubes (world line variability tester) produced by the clock module of DS3231 I2C communication are used as MCU by STM32F103C8T6)
Motor_Control - A）O
- 使用STM32F103C8T6的TIM2四路按键可控ＰＷＭ输出程序(Using STM32F103C8T6's TIM2 four button controlled PWM output program)
Program Project
- STM32F103C8T6的完整工程模版 可直接编译无需修改 用于快速编程 和工程创建(The complete engineering template of STM32F103C8T6 can be compiled directly without modification for rapid programming and engineering creation)
MSTP
- 使用STC89C52RC平台编写的8位辉光管11X74HC573,、DS3231（I2C）驱动程序的完整源码(The complete source code of the 8 bit glow tube 11X74HC573, DS3231 (I2C) driver using the STC89C52RC platform)
EDMA文档及代码
- Detailed information about EDMA, including the EDMA principle, and detailed EDMA code analysis.
姿态解算
- PX4上修改来的姿态结算算法,根据九轴传感器计算欧拉角(The modified attitude settlement algorithm on PX4 is used to calculate the Euler angle based on the nine axis sensor)
SignalTapII学习笔记
- signal tap ii FPGA开发测试模块 Verilog HDL 语言(signal tap ii testmodule Verilog HDL language)