资源列表
pseudorandom
- 伪随机m序列产生的VHDL语言程序- program in VHDL language for generating pseudo-random m sequence
top
- 脉冲多普勒雷达回波信号相干积累的VHDL源程序-pulse Doppler radar echo signal coherent accumulation of VHDL source
gaxgq16
- 16位并行相关器的VHDL程序-16 parallel with the VHDL-related procedures
fpdiv_vhdl
- 四位除法器的VHDL源程序-four division of VHDL source
multi_vhdl
- 四位乘法器的VHDL源程序-four Multiplier VHDL source
sine_generator
- 8位采样正弦波形发生器--8 bit Sin wave generator.
guoad
- 数模转换模块，数字量转换为模块量。-DAC Module, to convert digital to analog
guoda
- 数字量转换为模拟量！-To Convert Digital to Analog
testio
- 开关量控制模块。读取I/O口，输出开关量信号-switch control module. Read I / O port, the output switch signal
testtime
- 定时记数模块！对44B0的3号定时器编程。-regularly credited several modules! Right 44B0 of the 3rd timer programming.
DS1302HT1302 实时时钟与 89C2051接口子程序
- DS1302HT1302 实时时钟与 89C2051接口子程序-DS1302HT1302 real-time clock and 89C2051 interface subprogram
embadded_source
- 基于博创实验箱9个实验源代码。-Bo Chong-based experimental boxes nine experiments source code.