资源列表
iamgod
- this a very nice vhdl program for making shit and stuff... plz write back if any trouble with it-this is a very nice vhdl program for making shit and stuff... plz write back if any trouble with it..
51AVR
- 这些是自己大学里认为非常宝贵的AVR程序，希望会对大家有帮助。-And the infrared receive tectonic plate is mainly: Receives the TC9012 emission of infrared radiation signal, will receive the data demonstrates by the HEX way.
Nokia_6100_LCD_Display_Driver
- this doc willl show you how to control GLCD of nokia6610 to display your imagine using microcontroller
lpc2000.uart.baudrate.calculator
- to help you calcualte baudrate when program UART using LPC2-to help you calcualte baudrate when program UART using LPC2000
Yagarto_Toolchain
- to show you the way to use Yagarto Toolchain to program ARM
BurnC64xx
- 用于上位机对德州仪器的DSP的flash烧写，包括改变通信地址，写入新的工程文件等等。基于德仪Code Composer Studio IDE。-For the host computer on the Texas Instruments DSP' s flash programmer, including the change in mailing address, write a new project file and so on. Based on Texas Instrument
LCM_12864_DOORDOG
- 看门狗程序实例，LCM,12864 C语言实现-Watchdog instance, LCM, 12864 C language
ug200
- EDK 嵌入式开发软件使用的说明文档，可以帮助初学者经快入手-a guider of green hand to master xilinx edk soft wear
23-10111
- a simple serial to parallel converter using XILLINX and VHDL (the number of the project represents the binary code used by the converter e.g 23- 10111)
PLL
- PLL是数字锁相环设计源程序, 其中, Fi是输入频率(接收数据), Fo(Q5)是本地输出频率. 目的是从输入数据中提取时钟信号(Q5), 其频率与数据速率一致, 时钟上升沿锁定在数据的上升和下降沿上； 顶层文件是PLL.GDF-Digital phase-locked loop PLL is the design source code, which, Fi is the input frequency (receive data), Fo (Q5) is