- ofdm_signal-good 这个程序生成正交频分复用信号和它的频谱
- similar_windows_mspaint 类似windows画图程序
- Readandwriteprocedures24C02 AT24c02的读写和6位数码管动态显示的KEIL C语言演示程序 程序首先写入24C02中6位数据
- 56 vb与程序设置ie浏览器的默认主页地址v2.1
- 34exam Why your files are not be used? 1.The content is too simple 2.Is not a sourcecode or document 3.lost some files 4.Description is not detailed or not correct 5.Compressed file has password 6.Sourcecode duplicate or already exist
- erphpdown_6.0.1 基于vue2.0 和 element 搭建的一个后台管理界面(set up a background management interface based on vue2.0 and element)
资源列表
armsys2410-b
- 立宇泰2410核心板电路原理图（内含CPU SDRAM NANDFLASH）-2410 core plate circuit diagram (containing CPU NANDFLASH SDRAM)
classicalarithmeticofPID
- 本程序提供了经典PID算法的优化算法，适合单片微控制器的应用，请大家共享并提出宝贵的意见!-the procedures of classical PID algorithm optimization algorithm suitable for single-chip microcontroller applications, Please share and for the valuable advice!
2410
- ucosII在arm920T内核s3c2410移植的代码.-ucosII in arm920T s3c2410 transplant kernel code.
Nandbootload
- s3c2410的Nandflash的bootloader,参考wince的boot-s3c2410 the Nandflash Bootloader. Reference wince the boot
2410_iis
- s3c2410上移植ucos,并在ucos下实现iis音频功能-s3c2410 on transplantation OUT, OUT and under iis Audio function
LIYUTAI
- 立宇泰４４Ｂ０所有测试源代码，使用中请根据自己板上资源情况作相应修改-Thai 44B0-up testing of all source code, please use the resources according to its own board of the amended accordingly
banyanII
- BANYANII,JTAG SERVER,可以用ＷＩＧＧＬＥＲ调试ＡＲＭ程序的软件，使用方便．-BANYANII, JTAG SERVER, WIGGLER can use ARM debugging the software, easy to use.
ZooBoot-4510
- ４５１０Ｕ＿ＢＯＯＴ源代码，仅供参考．根据自己开发板资源情况修改测试使用．-4510U_BOOT source code for reference purposes only. According to its own development resources of the board to amend tested.
lcd_restored
- 这是一个用VHDL +图形法在CPLD内部搭建的液晶显示的驱动程序。液晶是ocmj5*10系列-This is a graphic with VHDL in CPLD internal structures of the LCD driver. LCD is ocmj5 Series 10 *
QT2440_Test
- 研勤公司2440开发板的测试程序，包括所有s3c2440模块的测试，推荐下载-research service company 2440 development board testing procedures, including all s3c2440 module testing, download
vhdlshiyan
- 本文为采用VHDL编写的程序及报告。步骤如下：1设计三位二进制计数器程序 二:设计一驱动循环显示7位数字 2编写LED控制程序如下： 3设计采用原理图方式如下: -VHDL paper prepared for the introduction of procedures and reports. Steps are as follows : Design of a binary counter three two procedures : Design of a drive
vhdlllbaogao
- 成都理工大学基于MAXPLUS II 的设计过程报告内涵有源程序及设计过程中的调试：在文本编辑窗口中输入二进制8位优先编码器的程序； 3设计驱动显示程序如下： 5采用原理图方式设计如下： 6引角分配图如下： 7仿真结果如下： -Chengdu University of Technology II-based FPGA design process report connotation source and the design process Debugging : in