资源列表
ddr3_128
- DDR3 读写操作，使用spartan6平台验证。(DDR3 read and write operations,the use of spartan6 platform validation.)
cmos_i2c_ov7670
- 完成OV7670摄像头的一个I2C协议配置，从机主机的时序读取编写功能(Complete the OV7670 camera an I2C protocol configuration, slave host timing read write function)
Comprehensive_FM_IP
- 在vivado平台上的用verilog语言编写的FM直接调制程序(On vivado platform of FM modulation directly program written in verilog language)
QPSK调制解调器的设计及FPGA实现
- QPSK FPGA的实现，QPSK调制解调器的设计及FPGA实现(Design and implementation of QPSK modem based on FPGA)
pseudo_random
- 基于vivado Verilog的伪随机数发生器，采用LFSR算法，并对其进行了升级，使用反馈级联的思想，从最大周期为2^n提升为原来的3-5倍(Based on vivado Verilog pseudo random number generator, using LFSR algorithm, and upgrade it, using the idea of feedback cascade, from the maximum cycle of 2^n to 3-5 times the
lattice_usb_ft2232_cable_sch
- Lattice USB FT2232 JTAG Programming Cable Schematic
Double_Pulse_Test
- 利用VHDL语言描述出一个双脉冲，可任意设置两脉冲长和中间时间间隔。(A double pulse is described in VHDL language, and the two pulse length and the intermediate time interval can be arbitrarily set.)
sata_opencore_rtl
- SATA控制器代码，来自opencore(code for SATA controller, from opencore)
EP4CE10F17C8
- FPGA的手册资料，EP4CE10F17C8的(Manual data of FPGA EP4CE10F17C8)
FPGA与SPI接口程序(hdl源代码)
- FPGA,VERILOG,SPI串口通信；(FPGA,VERILOG,SPI;;;;;;;;;)
mul8
- 用verilog设计了一个两个8位二进制数的乘法器(A multiplier of two 8 bit binary numbers is designed with Verilog)
adc
- 使用verilog 硬件描述语言编写的ad采样模块，希望对大家有用。(Using Verilog hardware descr iption language written in AD sampling module, I hope useful for everyone)