资源列表
2FSK_decode
- 程序实现2FSK的解调，使用过零检测法，分为预处理模块和鉴频处理模块，Verilog语言，在modelsim仿真通过-2FSK Program for demodulation of zero-crossing detection method used, divided into pre-processing module and the discriminator processing module, Verilog language, adopted in the modelsim sim
wm8731App1
- 刚完成的基于DE2-70FPGA开发板的音频处理程序，研究了3天，好不容易完成的。使用WM8731芯片实现AD采集，然后通过DA输出到line out.-Recently completed development board based on DE2-70FPGA audio processing procedures of the three days, finally completed. AD using the WM8731 chip collection, and then DA o
spdmeasure
- 脉冲测速，用VERILOG语言实现，自动跳档-Pulse velocity, with the VERILOG language, automatically skip files
GPS
- 基于SOPC的GPS设计，全部源码，对于开发GPS有较大帮助~-The GPS-based SOPC design, all the source code, greater help for the development of GPS
uart-code-Verilog
- uart控制器源码-verilog 含源码，测试向量-uart-controller-verilog-code
whitenoise
- 信噪比可变的加性高斯白噪声信道下信号发生器的VHDL语言编程实现-the realization of data-creater on AWGN channel
SRAM
- FPGA控制SRAM的VERILOG源码-The VERILOG source code control SRAM FPGA
des
- VHDL实现的DES密码算法的完整的加解密。-DES
DDSSYNCtrl_tri_face
- AD9910的实验代码，使用并口实现快速调频，编程通过原理图和语言混合-AD9910 experimental code, the use of parallel fast FM, the programming language through the schematic and mixed
dsp
- WCDMA中频FPGA DSP处理程序，DSP采用TMS320C6203，完成FPGA的调制参数配置和各物理信道编码数据的发送。-DSP program fot WCDMA middle-frequency FPGA. Use TMS320C6203 as DSP chip.
BCHdecode
- BCH(63,56) decode,verilog
mtspeed
- m法t法编码器测速 verilog语言 m法采样时间可调 t法间隔周期可调-m method t method m encoder velocity verilog language law law sampling time interval period adjustable adjustable t