资源列表
qnx_training_projects
- qnx training materia
阵式数字显示控制
- 用AT89S51单片机控制阵式LED(8×8点阵)循环显示数字“0~9”,要求显示时间可调。(LED (8 * 8 dot matrix) is used to control the number of "0~9" by AT89S51 single chip microcomputer, which requires that the display time can be adjusted.)
多点定是数字钟的设计
- 以AT89S51单片机为核心器件,组成一个定时数字钟系统,系统显示器由四位数字型数码管组成,分别显示小时和分钟,能够随时对当前时间进行调整,并能构随时输入定时时间,在定时时间到时会有提示音提示时间已到。(Using AT89S51 microcontroller as the core device, a digital clock timing system, the system displays a four bit digital type digital tube, respectiv
数字钟设计
- 1. P0.0/AD0控制“秒”的调整,每按一次加1秒; 2. P0.1/AD1控制“分”的调整,每按一次加1分; 3. P0.2/AD2控制“时”的调整,每按一次加1个小时;(1. P0.0/AD0 control "second" adjustment, each time plus 1 second; 2. P0.1/AD1 control "sub" adjustment, each time plus 1 points; 3. P0.2/
转弯灯
- 用AT89S51单片机根据转弯开关的状态控制相应的转弯灯。(The corresponding turning light is controlled by the state of the AT89S51 single chip microcomputer according to the state of the turning switch. When the left switch is switched on, the left light shines; the right ligh
继电器控制
- 用8031单片机和8255控制继电器,实现外部电路转换。按一个按钮,第一条线通,再按一下,第一条线路断开,第二条线路通。(The external circuit conversion is realized by using 8031 single chip and 8255 control relay. Press one button, the first line is connected, and then press, the first line is broken and the
华为_FPGA设计高级技巧Xilinx篇
- 华为_FPGA设计高级技巧Xilinx篇(HUAWEI _FPGA design advanced techniques Xilinx)
实验5:静态数码管显示
- 在单片机上实现静态数码管的显示,显示一位数字(The display of a static digital tube is realized on a single chip computer and a digit is displayed.)
实验6:动态数码管显示
- 在单片机上实现动态数码管的显示,同时显示多位数字(The display of the dynamic digital tube is realized on the single chip microcomputer and the multi digit number is displayed at the same time)
从零开始学CPLD和VERILOG HDL
- 从零开始学CPLD和VERILOG HDL(Learn CPLD and VERILOG HDL from zero)
cfar_test - 副本
- 一款实现CFAR的程序,用户可以通过读取数据文件验证算法的有效性,简单实用,是做信号处理的者的小帮手。(CFAR implementation of a program, users can read data files to verify the effectiveness of the algorithm, simple and practical, is a small helper to do signal processing.)
LoRaV1.0
- 基于STM32的LORA测试代码,可实现LORA模块的数据收发。(The data receiving and receiving of LORA module can be realized.)
