资源列表
cadenceveriloglanguageandsimulationcourse
- cadence verilog lanaguage and simulation course
DesignThroughVerilogHDL
- design through verilog hdl
VHDLProgrammingbyExample
- VHDL programming by example
vlogref
- cadence verilog reference
miaobiao
- 一个精确的到0.01s的时钟源程序，对于初学VHDL理解很有帮助，只给了源程序没有给出仿真波形-An accurate clock source to the 0.01s for the beginner to understand VHDL helpful not only to the simulation waveform of the source
clock
- 这是一个时钟的VHDL的源程序，里面包含有源程序，还有工程文件对大家很有帮助-This is a clock VHDL source code, which contains the source code, as well as engineering documents helpful to everyone
Infra1_top
- 在FPGA上实现红外传输写的顶层文件，望大家给与意见，-In the FPGA to achieve the top-level document written by infrared transmission, hope you give advice, thank you
TR0114VHDLLanguageReference
- TR0114 VHDL Language Reference
McGrawHill_VHDL_Programming_by_Example_4th_Ed_upd
- Electronic and system matlab simulation
hamingFPGA
- 本文介绍了汉明编码与译码通过FPGA器件来实现，介绍了使用VHDL语言编程的基本算法！-This article describes the Hamming encoding and decoding through the FPGA device to implement, introduced the use of VHDL programming language is the basic algorithm!
clock
- 基于fpga的多功能数字时钟的实现，已经编译过了，绝对可行-fpga-baseed clock
verilogfenpinqi
- verilog分频器代码 分为偶数倍分频和奇数倍分频两个verilog源文件 附带一个说明文档-divider verilog code for multiple sub-divided into even and odd frequency divider several times with a two verilog source files documentation