资源列表
ADC_CONTROL_VERYLOG
- 运行在FPGA上的Verilog程序(实现对ADC的控制)-Verilog procedures (the achievement of the control of the ADC)
DS_FH
- 扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现-Frequency-hopping communication QUARTUS7.0 expanded development environment in the VHDL source code and the achievement of the overall block diagram
rmfilter
- 低通滤波器在QUARTUS7.0开发环境下的文本与框图结合的实现方法的源代码-Low-pass filter QUARTUS7.0 development environment in the text and diagram combination of methods to achieve source code
VHDL_Beginners
- this ebook for electronics hobbiest. VHDL for Beginners
vhdl_intr
- vhdl的基础性的介绍，对初学者大有用处-vhdl basic introduction
I2C
- 这是一个I2C接口的VHDL实现模块，实现I2C协议-This is a realization of I2C interface VHDL module, I2C protocol to achieve
fifo1
- 异步FIFO的设计 包括testbench 已调试成功-Asynchronous FIFO design includes testbench debug success has been
cu
- 用VHDL硬件描述语言编写数码管译码显示-Using VHDL hardware descr iption language decoding digital tube display
double_subc
- Verilog 下 16位除法算法程序，高精度，固定17个时钟周期-Verilog under 16 division algorithm procedures, high-precision, fixed in 17 clock cycles
Segment2
- ep2c5 实现 段寄存器 verilog语言，quartus 2 仿真-the realization of paragraph ep2c5 register verilog language, quartus 2 Simulation
BaseGate
- ep2c5 实现 逻辑门 verilog语言，quartus 2 仿真-ep2c5 the realization of logic gates verilog language, quartus 2 Simulation