资源列表
sanxiangxinhaoyuan_c_yuyan
- 三相信号源与fpga通讯的程序，控制写频率和相位控制字-Three-phase source fpga communications and procedures to control the frequency and phase control to write the word
JsonWince
- 在WINCE中对JSON文件进行序列化与反序列化操作（C#）-JSON file in WINCE serialization and deserialization operations (C#)
compare2bits
- 中山大学数字设计和计算机体系结构-2位比较器的设计和实现-Sun yat-sen university digital design and computer architecture- 2 a design and implementation of the comparator
key
- 按键中断 转换为外部时钟 控制流水灯左右移-Button to interrupt converted to shift around the external clock control water light
SJF2440-source
- SJF2440是S3C2440使用JTAG的FLASH烧写工具，虽然速度慢，但比较稳定。这个是源码，可以参考一下JTAG的操作原理，使用VC编译。-SJF2440 S3C2440 is the use of JTAG FLASH burning tools Although slow, but steady. This is the source code can refer to the JTAG operating principle, the use of VC compiler.
DIANZICHEN
- 在STC51上开发的一个电子称程序 KEILUV3环境开发
led_0
- c8051f120通过CD4094控制6位led，达到了节约单片机端口的目的-c8051f120 control 6 through CD4094 led, to achieve the purpose of saving microcontroller port
fpga.fifo
- 异步FIFO是用来适配不同时钟域之间的相位差和频率飘移的重要模块。本文设计的异步FIFO采用了格雷（GRAY）变换技术和双端口RAM实现了不同时钟域之间的数据无损传输。该结构利用了GRAY变换的特点，使得整个系统可靠性高和抗干扰能力强，系统可以工作在读写时钟频率漂移达到正负300PPM的恶劣环境。并且由于采用了模块化结构，使得系统具有良好的可扩充性。-Asynchronous FIFO is an important module which always used to absorb the
clock
- 用Freescale半导体公司HC08系列单片机制作了电子时钟,具有整点报时、闹钟、时间日期设置等功能（c语言编写）-HC08 with Freescale Semiconductor, Inc. has produced a series of single-chip electronic clock, with the whole point timekeeping, alarm clock, time and date settings and other functions (c lan
litishengzhuan5.1
- 立体声转5.1声道CSC2323F驱动,已经调试通过，5.1空间感不错-Convert stereo to 5.1 channels of CSC2323F driver, debugging has been passed, the 5.1 sense of space.
EEPROM
- nec单片机 模拟EEPROM 的应用 非常实用-nec 模拟EEPROM
NCP551SN33T1
- 宽电压输入DC-DC降压芯片. 体积小。-Wide Input DC-DC buck chip. Small size.