资源列表
clock
- FPGA的时钟算法 完整运行文件 通过Xilinx8.2的环境 波形仿真来实现时钟计数-FPGA clock algorithm to run it through a full environmental Xilinx8.2 simulation waveform to achieve the clock count
0809
- ADC8位转换，显示电压，精度低，电子竞赛培训内容，显示电压需自己进行分解数字-ADC8 digital conversion, display voltage, low accuracy, e-contest training, show the voltage required to break down their numbers
2009_National_Electronic_Design_Competition_B_titl
- 此为2009年全国电子设计大赛B题移动平台程序,可以控制平台直走,左右直角转弯,停止等. 开发环境:CodeWarrior 4.5 芯片:mc9s12dg128-This is the 2009 national title Electronic Design Contest B mobile platform program, you can control the platform, go straight, left and right angle turns, stop and so o
shijandingshiqi
- 本作息时间控制设计采用51系列的微处理中的定时器定时。采用定时器中断方式，控制键盘及6位LED显示，显示时、分、秒。并且及时对时间进行调整。可实现定时、打铃、准确走时功能，能够按照学校作息时间实现自动打铃。-Time control design uses the rest of the microprocessor 51 in the timer timing. Using the timer interrupt mode, control the keyboard and 6 LED dis
FS44B0_uCOS276
- FS44B0芯片ucos移植代码，可以了解ucos
lcd602
- read and A/D change and display,use micropic muc
PWM-stm32
- 运用STM32微处理器进行PWM电机控制-The use of microprocessor STM32 Motor Control PWM
CCDPTLC5510PDMA
- 功能CCD+TLC5510+DMA的K60驱动代码-The K60 driver code function CCD+TLC5510+DMA
propeller-clock
- 很炫的LED旋转钟，内有响应的软件及硬件。-software and hardware for a propeller clock.
Spartan3FPGA
- xilinx spartan3 FPGA的最准确权威的配置方法-xilinx spartan3 FPGA authority of the most accurate way to configure
8-point-pipeline-fft-by-verilog.pdf
- 简单的8位基2 流水 fft verilog-Simple 8 base 2 pipelined fft verilog
mp3-lingyang
- 凌阳音频方面的详细程序资料，希望能够有用-Sunplus detailed procedures for audio information, I hope will be useful,