资源列表
SEG7_Timer
- 七段数码管时钟显示的verilog程序，开发环境quartusII7.0-Seven-segment digital tube display clock verilog program development environment quartusII7.0
AVR1
- AVR教程是相当完整的一套AVR的开发学习资料。-AVR tutorial is very complete set of the AVR development of learning materials.
camera_test6
- 摄像头数据进行3*3表格的处理 然后进行中值滤波，8级流水线，速度快-Camera data for 3* 3 forms processing and then median filter, 8 lines, fast
20150520LED_IP
- xilinx SDK定制IP核，实现LED点灯，以及PWM脉冲点灯，该例程可以直接运行。里面还有相应的文档说明，定制IP学习你值得拥有。-xilinx SDK custom IP core, realize LED lighting, and lighting PWM pulse, the routine can be run directly. There is also a corresponding documentation, customized IP learning you des
SEG7_Timer
- 一个采用数码管显示的数字钟，能设置时间和显示模式的切换-A digital display digital clock, can set the time and a display mode switching
SEG7_Timer
- 里面主要写的是数字钟的代码，程序准确，请大家放心下载-Which is mainly to write is the code of the digital clock and accurate procedures, please rest assured download
FFTVLSI
- fft in fpga logic implementation
Dorf--Svoboda----6th-Edition
- Introduction to Electric Circuits, 6th Edition by Dorf and Svoboda
LocationApp
- location algorithm based on RSSI with CC2530。
MIPS32SingleCycle
- VHDL Implementation of a 32bit Single Cycled MIPS.-VHDL Implementation of a 32bit Single Cycled MIPS.
Single-chip
- 单片机的课件，老师讲课的我全复制过来了。-SCM software, the teacher lectures, I copy over the whole.
S3C6430X_UM_Preliminary_Rev0.00_080620.pdf.tar
- User Manual for s3c6430 SoC. Complete hardware descr iption.