资源列表
servopwm
- test servo i want your file
qdq
- 基于ＦＰＧＡ的多路抢答器，采用Ｖｅｒｉｌｏｇ语言编写-FPGA-based multi-Responder, using Verilog language
sr12univ_a
- universal shift register vhdl
sjf(npre)
- Code for job scheduling in an operating system using Shortest Job First Algo
Spi
- 用于SPI接口通讯，用Verilog语言编写的SPI模块-SPI interface for communication with the Verilog language of the SPI module
connect_vhd
- 本程序的功能为检测输入信号范围是否在限定范围内，经ad转换器输入，经fpga芯片的Virtex4芯片输出来判断结果。-The functionality of the program for the detection of input signal range is within the limits, the ad converter input, the output fpga chip Virtex4 chip to determine the results.
CNT10
- 10进制计数器，使用altera芯片集成的80c51软核-10 binary counter, use the 80c51 chip altera soft-core
GCD
- 可以很好的实现求解最大公约数，并且语法结构易懂-Good solving the common denominator, and easy to understand
jtd
- 简易交通灯的VHDL程序 采用模块化的设计思想 采用状态机的形式编写主要的控制模块-Simple traffic light VHDL program uses a modular design concept in the form of a state machine to write the main control module
Hilb
- Hilbert transform explain
单片机小程序
- 写得一些简单小程序