资源列表
78_alu_input
- vhdl源程序，在quartus环境下测试，仿真。已经过测试。-VHDL source, the Quartus environment testing, simulation. Has been tested.
shopdesigned
- 全部通过，是我的精心设计，完全满足初学者的要求。-all passed, I was carefully designed, fully meet the requirements of beginners.
top
- 脉冲多普勒雷达回波信号相干积累的VHDL源程序-pulse Doppler radar echo signal coherent accumulation of VHDL source
clock-a-stopwatch
- 基于DE2-70平台，可实现功能： 1、在LCD上显示时间 2、在数码管上显示跑表-DE2-70-based platform, enabling functions: 1、display time on the LCD 2、display stopwatch the digital tube
mucisd1720
- 该程序的平台是：盛群单片机+ISD1720语音芯片+超声波，三个模块一起实现的。-Platform for the program are: Holtek Singlechip++ ISD1720 voice chip ultrasound, implementation of the three modules together.
uarta
- dsp uarta 串口通信程序，用于单一的串口通信，最大传输速率3.25Mbps-dsp uarta serial communication interface
8253clock
- 本实验利用8253做定时器，用定时器输出的脉冲控制8259产生中断 在8259中断处理程序中，对时、分、秒进行计数，在等待中断的循 环中用LED显示时间。 8253用定时器/计数器1，8253片选接CS4，地址为0C000H。8253时钟 源CLK1接分频电路的F/64输出。分频器的Fin接4MHz时钟。8253的 GATE1接VCC。 8259中断INT0接8253的OUT1，片选接CS5，地址为0D000H。 显示电路的KEY/LED CS 接CS0
RTC
- DSP对外围扩展的时钟芯片的读写编程源代码-Clock chip to read and write
BramComCtrl
- xilinx FPGA BramComCtrl source.
telix
- library to virtualize by rs232 an ansi terminal (like vt100 for example)
IC_DC
- All commands required to run DC and I-All commands required to run DC and ICC
pci-sh5
- Support functions for the SH5 PCI hardware.