资源列表
LPC-P2106-uart_echo
- arm开发 phils LPC2106 串口通讯源码-phils LPC2106 development arm serial communication FOSS
freescale-smart-car
- 飞思卡尔智能车竞赛 光电组程序 曾获得全国二等奖- progamme of group of photoelectricity freecale smart car
LCD-display
- LCD 液晶 PIC源代码，供大家参考，花了几天时间-LCD LCD PIC source code, for your reference, spent a few days time
PIC18F2580
- 基于PIC18F2580单片机SHT11的温湿度检测和相应LCD1602显示，控制风机以及蜂鸣器报警的Proteus仿真（基于单片机的畜禽养殖环境控制系统的部分仿真）-Based on PIC18F2580 microcontroller SHT11 temperature and humidity detection and corresponding LCD1602 display, fan control and Proteus simulation buzzer alarm (based
zAPS
- ZIGBEE应用子层程序 比较简单 开发环境：MPLAB
FPGA-common-warning
- FPGA常见警告，适合参考解决编译问题，十分实用-FPGA common warning, compiled for reference to solve the problem, very useful
W3100ASocketAPI
- WIZNET公司W3100API库用于TCPIP开发简化你的网络接入开发步骤-WIZNET W3100API companies for the development of simplified Beginners your network access development steps
shumaguanjingtaixianshijidingshiqihezhongduanyingy
- 利用定时/计数器T1的方式1，产生10ms的定时，并使P1.0引脚上输出周期为20ms的方波，采用中断方式，设系统时钟频率为12 MHz。 -Using Timer/Counter 1 T1 way to produce timing 10ms, and to P1.0 pin outputs a square wave period of 20ms, using interrupt mode, set the system clock frequency is 12 MHz.
adp5588
- BF518读取键盘解码芯片的程序，并将键码显示在编译器中，使用VisualDSP++编译环境。-BF518 read the keyboard decoder chip procedures, and key code displayed in the compiler, use the VisualDSP++ build environment.
ccd-in-verilog
- ALTERA关于CCD的一些verilog程序，都通过运行无误的。
Lab7
- Adder Substrator 能夠顯示在FPGA上並且能夠實際作加減 可做signed int -Adder Substrator