资源列表
HD7279
- C51语言的HD7279驱动程序-the HD7279 C51 Driver
ro_cnt
- 小型的计数器编码，采用verilog语言，经测试可通过
3
- 电子钟程序，显示部分使用的是74HC595串转并芯片，键盘部分则使用了74HC165并转串芯片。
用VHDL语言实现四人智力竞赛抢答器的设计
- 1、用feng模块将选手按下按键信号输出高电平给锁存模块lockb，进行锁存的同时发出aim信号实现声音提示，并使count模块进行答题时间的倒计时，在计满100妙后送出声音提示； 2、用ch41a模块将抢答结果转换为二进制数； 3、用sel模块产生数码管片选信号； 4、用ch42a模块将对应数码管片选信号，送出需要的显示信号； 5、用七段译码器dispa模块进行译码。
temperature
- 使用FPGA控制18B20达到温度采集过程，并显示在数码管上。-Achieved using the FPGA control 18B20 temperature acquisition process and display the digital pipe.
stateRevisited.tar
- simple example of a finite state machine with test bench
uart
- 51单片的串口实现数据的收发过程，也可使用中断形式实现数据的收发。-51 single serial port to send and receive process data can also be used to send and receive data interrupt form.
24c02
- 通过24C02中读取数据，然后加1，其中数码管的次数就是开机的次数-Read data through the 24C02, and then add 1, where the number of digital control is the number of boot
wzm
- 用单片机C51语言进行直流电机的控制，分享一下-DC motor control, share microcontroller C51 language
enetcl
- this tcl file for simulation of ns2 and with and without energy level setting you can put setting of eachnode enegy level here in tcl file ok-this is tcl file for simulation of ns2 and with and without energy level setting you can put setting of each
PID
- 最为经典的PID控制算法程序源代码。实验背景的控制输出DA芯片的数字量。-The most classic PID control algorithm source code. DA chip to control the output of the digital experiments backgrounds.
half_add
- half adder in verilog