- InternshipReport 提交清单: 程序源代码 Src文件夹 可运行程序 Run文件夹 用户文档OpenOffice版 Repoort中HelpDoc.sxw 用户文档Office版 Repoort中HelpDoc.doc 程序运行方法: 1
- ques_1 openMP parallel program to calculate the value of PI using different scheduling policies.
- KEY-PWM /*用T1定时器做PWM定时
- Calculator_V2.1 android开发一款简单的计算器
- zhuanma1.0 中文域名转码asp版
- DC_DCduanxv boost在断续情况下的单环控制
资源列表
I2C
- 单片机实现I2C总线通信.简单明了,一看就懂.-MCU I2C bus communication. Simple and clear, a glance to understand.
ASS58N
- 把格雷码转换成十六进制的C语言程序,用来读取编码器的值-Gray code put into hexadecimal C Programming Language, used to read the value encoder
cordic
- cordic verilog 程序及仿真结果 8级流水线
DSP280x_CodeStartBranch
- 用于C2000的处理器初始代码,在调用main()之前使用本代码。-initial c2000
clock
- 具有定时可调多功能数字电子钟,本人已经在fpga上调试成功-With adjustable multi-function digital electronic clock timer, I have been successful in the fpga debugging
16adc
- mage16的ad实验程序已经在16实验板上验证成功了-mage16 the ad experimental procedure has been verified in the 16 experiments on-board success
uart
- 一个实用的uart协议模块,使用verilog 实现-A practical uart protocol modules, use verilog to achieve
VHDL-code
- 使用VHDL语言进行门电路,优先编码器,译码器,各进制计数器,数码管显示的编写,在QUARTUS ii上模拟可用-Gates using VHDL language, priority encoder, decoder, each binary counter, write digital display, analogue available on QUARTUS ii
murty-vdl1
- these are basic vhdl codes to further improvement
AD50
- dsp原理及应用第七章,第八章源代码.AD50的源代码下载-dsp principle and application of Chapter VII, Chapter VIII of the source code .AD50 source code download
uart_control
- uart控制 串口控制 top层接口 总控制-uart contrl Verilog
mac_accumulator
- VHDL Multiplier Adder Accumulator together with Test Bench.
