资源列表
paobiao
- 用verilog写的跑表程序--Stopwatch program written by verilog.
m62429_volume_control
- M62429控制程序，其中包括增音、减音，将常用的子程序已经打包处理了，用户可以方便调用-M62429 control procedures, including by the sound, by the sound will be used have been packing processing subroutine, the user can easily call
paobiao
- 基于stc89c51 的单片机的跑表设计，计时准确，带有防偷跑功能。-Microcontroller-based stc89c51 the stopwatch design, timing accuracy, with anti-Unleashed features.
50MSeparatefrequencydevice
- vhdl语言设计中常用到的50M分频器，可以以此设计出各种需要的分频器。-vhdl language commonly used in design to the 50M divider, can also be used to design the divider needs.
ADC0
- 基于c8051f020的ADC0转换程序，实现模拟信号的采集-Based on c8051f020 the ADC0 conversion process, analog signal acquisition
lcd
- 接口技术实验，实现在LCD上倒计时，程序中可设置起始时间。-lcd set time
Source-Code-PR5
- simple program for the line follower with using PIC 16f690
dac7621
- dac7621数模转换驱动，使用verilog语言写的。-dac7621 digital to analog conversion drive
syn_fifo
- 同步FIFO源代码，使用Verilog编写，用户可以轻松转换成VHDL。-Synchronized FIFO source code
main
- 51模拟P2262编码无线发送，用的是315M超再生模块-51 and P2256 send 315M
rcvr
- verilog的串口接收程序，有详细注释，适合学习-verilog serial port to receive the program, there are detailed notes, suitable for learning
lock
- 界面密码锁，具有回删功能，只有输入正确的密码，才能打开界面，才能进行下一步的操作。-The Screen Lock