资源列表
chuan_to_bing
- 16位A/D转换程序，使用MAX+PLUS2做的，用状态机做的，但不够完善，望大家见谅
crc8
- 8位crc的verilog设计 通过仿真综合验证并已应用在工程里面 -verilog of 8bit error checkout
vendingmachine
- vendingmachine vhdl code
multiplier54
- this code is for 4*4 array multiplier in vhdl it is vhd file that works very we-this code is for 4*4 array multiplier in vhdl it is vhd file that works very well
fifo
- 一个同步FIFO，该FIFO深度为16，每个存储单元的宽度为8位，产生FIFO为空、满、半满、溢出标志。-A synchronous FIFO, the FIFO depth of 16, each storage unit width of 8, asked to produce the FIFO is empty, full, half full, the overflow flag.
digitaltube_74hc595
- 基于 74hc595、可以多块拼接的四位数码管显示。-Based 74hc595, you can multi-block mosaic four digital display.
485-flag
- 采用485环路工作的网络方式，可实时检测到网络开路或者短路的故障状态-Work using 485 loop network mode, real-time network open or short circuit detected a fault condition
shizhong
- 时钟计时，51，主要是利用定时器来记数，数码管显示。-Things that are possible：The clock count。
12864
- 12864的简单显示，对初学12864的同学会有一点的帮助。-12864 simple display, for beginners 12,864 students have little help.
RECORD-CAL
- Winbond的ISD2500系列提供高品質,單片機,解決聲音錄放問題.此CMOS IC包含有晶片上的震盪器,MIC放大器,自動增益控制,防止聲音失真濾波器及喇叭放大器.-Winbond s ISD2500 series provides high-quality, single-chip, to solve the problem of sound recording. This CMOS IC contains the oscillator on the wafer, MIC amplifi
AVR-IOUSART
- AVR单片机模拟串口程序_C语言（代表一个定时器和两个IO）-AVR microcontroller simulation serial process _C language (representing a timer and two IO)
vga256
- 本代码是用于Xilinx FPGA 开发板 开发实验的 vga256 verilog源代码 -This code is used for Xilinx FPGA development board developed experimental vga256 verilog source code