资源列表
jishi
- 一个计时程序，用１６f８７７编写的，由于水平有限有一定的误差-procedures for a time, with 16f877 prepared, as a certain level of limited error
niosforsram
- 本程序功能是在FPGA上nios处理器的sram接口程序。
WS2051
- 通过89C2051单片机扩展8051单片机的通信接口，本例程就是利用89C2051单片机为8051单片机扩展了一个RS-485通信接口-89C2051 Singlechip through the expansion of the communication interface 8051, the routine is to use 89C2051 microcontroller 8051 to expand a RS-485 communication interface
port
- mc9s12xdp512 micro controller port initialization. Its a freescale controller and is used to communicate between io s
statemachine
- RTL级verilog代码 用状态机实现 将输入数据写入16位寄存器，输出其除以7所得的余数（4位）-RTL-lever verilog code Using FSM to realize the following function:input the data into a 16bit register, divide it by 7, and output the 4-bit remainder
pll
- verilog硬件描述语言实现数字锁相环功能仿真,-Digital phase-locked loop using verilog
CORDIC
- 基于FPGA的CORDIC数字计算机的设计-CORDIC FPGA-based design of digital computers
51IR
- keil C51红外解码,已经通过测试！-51 IR decoding
password-locker
- 简单的单号密码锁程序 在verilog上实现 包括测试程序-simple password locker programme based on verilog, which including test bench
4
- 8x9FIFO逻辑功能的VHDL语言程序，程序中定义了四个进程，用来寄存数据，控制读指针，控制写指针以及控制三态输出-VHDL language program for 8x9FIFO logic function, the program defines four processes for data storage to control the read pointer to control the write pointer as well as to control three-stat
sim900a
- gprs 模块读取程序是关于sim900a的-gprs read program that s about sim900A
SPI_Config
- SPI config for STM32F2