资源列表
State-Machine
- 带同步复位的状态机，适合VHDL初学者练习。
add_tree_mult
- 8位加法树乘法器,实现两个8位二进制数相乘，采用verilog hdl-8-bit adder tree multiplier, the achievement of the two 8-bit binary number multiplied, using verilog hdl
MFSK
- 多进制数字频率调制(MFSK)系统VHDL程序-Multi-band digital frequency modulation (MFSK) system VHDL procedures
leds
- 数码管显示程序，可以显示当前的数值，可以动态显示和静态显示 可以选择显示方式-Digital tube display program can display the current value, you can dynamically display and static displays can choose to display
FIFO82
- 一个测试FIFO16的VHDL程序，关于FPGA的，大家有用的分享啊-A test FIFO16 the VHDL program, on the FPGA, and it would be useful to share ah
hello1
- 循环显示hello的vhdl程序，很实用哦，我们都试过-Hello, vhdl program cycle shows, it is practical Oh, we have tried
bfly_r2dit
- 这是一个用verilog编写的FFT的蝶形因子程序，它与下面的文件构成整个FFT程序-This is a written with verilog program FFT butterfly factor, file it with the following procedures constitute the whole FFT
ad5238vhdl
- vhdl ad5238 模拟SPI控制 AD5238-vhdl ad5238
top
- 在ISE环境里，用verilog语言编写得数码管显示程序，能动态计数-In the ISE environment, use the verilog language digital display program was able to dynamically count
877_i2c
- I2C implementation for PIC 16F877_hitech c
Binary_Multiplier_Binary_Multiplier1.vhd
- its vhdl proggrame for binary multiplication
uart
- C语言uart通讯,包含C51的代码，C语言uart通讯,包含C51的代码-C-uart communication, including the code C51