资源列表
SEED-VPM642-v2.0
- 合 众 达 芬 奇 DSP 开 发 板 原 理 图。-United Dada Vinci DSP development board schematics.
rapid_development_code
- rapid development based on ADI Blackfin DSP-Blackfin rapid development
signal-generator
- Design of DDS signal generator based on VHDL+FPGA, has been through the adjustable, can be directly used, simulation -DDS signal generator circuit design, Verilog source code, can be directly used, simulation
MB91520_DS705-00011-0v01-E-
- 富士通91520系列，芯片手册，FR81s家族 -Fujitsu 91520 series, chip manuals, FR81s family
ISE_lab15
- 基于VHDL语言，介绍XLINX公司生产的FPGA系统中 PicoBlaze软核的基本应用。利于初学者使用-Based on VHDL language, introduced XLINX produced PicoBlaze soft-core FPGA system the basic application. Help beginners
openocdSRC
- OpenQCDSRC 源程序,实现ARM7 9 11等功能-OpenQCDSRC source to achieve features such as ARM7 9 11
ucosII专门针对ARM7的源代码实现
- 针对UCOS的移植,对ARM7体系架构上的做移植.是一个很麻烦的问题,您需要的是修改一些底层的启动代码.-against graft, ARM7 architecture of the transplant. It is a very troublesome question, you need to be some change in the bottom of the boot code.
projet-fpga
- analog acquisition+traitement+digital output
ALUC
- 用verilog语言中xilinx平台上实现single ALU,包括alu的基本MIPS指令运算,ALU control的实现-Xilinx verilog languages with the platform to achieve single ALU, including the basic MIPS instructions alu operations, ALU control implementation
quartus2
- quartus 2 软件学习资料，为处学者提供详细的软件操作及其编程语言介绍-Quartus 2 software, learning materials, for scholars Department provide details of the software and its programming language introduced
0001_EPM3064最小系统模块_带JTAG_LED_2mm插针
- EMP3064的开发板板，原理图，verilog例子，板子说明，规格书，全套资料(EMP3064 development board, schematics, Verilog examples, board instructions, specifications, a full set of information)
pipe25_rc5
- pipe可以用于绘制随机petri网和系统性能分析(pipe for help leaner in start stage get more about how to conduct petri net)