资源列表
FIFO_EMIF.rar
- 实现FPGA通过EMIF总线给DSP定期发送数据的功能,FPGA implementation through the EMIF bus regularly send data to the DSP function
Digital-Clock
- 基于FPGA 的数字时钟SHEJI-Digital Clock in the FPGA
02_FPGA_Emulation_ITRI
- FPGA Emulation guide with EVS6 FPGA Board
Keyboard-and-mouse-Verilog
- Keyboard and mouse-Verilog
keyboard_ps2_verilog
- 键盘鼠标的原代码,用FPGA实现,使用Verilog HDL编写,已经使用FPGA验正过了,完全可以用-keyboard and mouse of the original code, using FPGA, using Verilog HDL preparation, already in use FPGA-mortem is over, it can be used
LCD_DE2
- verilog lcd1602 显示程序-the verilog lcd1602 display program
ARM9的远程视频监控系统
- 基于arm9的远程视频监控系统，使用Qt编写客户端和服务器端，客户端可实现视频保存功能。服务器端运行于移植有linux内核的MINI2440上，客户端运行于PC上，服务器端将采集到的视频数据发送到客户端，客户端实现对视频的显示和保存等功能。(ARM9 based remote video surveillance system, the use of Qt write client and server, the client can achieve video preservation fun
CycloneIII_SB_3C25
- Altera的CycloneIII Start Board,使用的PFGA是3C25，包括原理图和PCB，用Cadence Allegro打开-Altera
51_reader
- 一款基于51单片机的电子书阅读器的protues 包含很多工具 可以做实物-A microcontroller e-book based on 51 readers protues contains many tools can do in-kind
millisecond_counter
- 基于Spartan6写的fpga秒表，可以在七段译码管上显示，而且用按键来实现秒表的计时开始，停止，累加。而且该项目是移动信息工程学院的课程项目之一，希望对有需要的人有帮助-Fpga based Spartan6 write stopwatch that can be displayed on the seven-segment decoder pipes, and use the keys to achieve the stopwatch start, stop, accumulate. An
F1最小系统
- STM32F103C8T6最小系统原理图和PCB工程(Stm32f103c8t6 minimum system schematic and PCB Engineering.)
LabVHDL_10-12
- fpga clock alarm time-fpga clock alarm time