资源列表
MyFCS1
- FPGA软硬件，完成飞行控制系统任务，包括数据通信、飞行控制律解算等。-FPGA software and hardware
ks
- PID控制器的课程设计，在控制理论基础课程中适用-Curriculum design PID controller
ESP8266 5V WiFi
- ESP8266 5V WiFi继电器智能物联网模块 智能家居 手机APP遥控开关(ESP8266 5V WiFi Relay Intelligent Internet of Things Module App Remote Control Switch for Smart Home Phone)
uart_tx_rx
- 在altera的FPGA平台上实现rs232串口的自收发通信，速率为115200波特率，PC机使用串口调试助手即可观察结果。包含全部代码与工程，本人亲自测试通过。-Realization of self transmitting and receiving communication serial port of RS232 In altera on the FPGA platform, at a rate of 115200 baud rate, PC using serial debuggi
swrc072a
- 密西西比大学开发的ZIGBEE源代码，能组成MESH网络，开发平台为IAR。-University of Mississippi ZigBee development of source code, can be composed of MESH network, the development platform for the IAR.
stm32f207webServer
- stm32f207 网页服务器源码，实现了网页的访问。公司项目都用了。-Stm32f207 web server source code, to achieve a web page access. Company projects are used.
stm32 pmsm driver
- 基于STM32 的PMSM 电机驱动，使用霍尔和光电编码器。(STM32 based PMSM motor drive using Holzer and photoelectric encoder.)
Code-Easy5509
- DSP5509方面的资料 源代码等5509适合做语音处理,以前使用过的资料,基本可用.-DSP5509 such information 5509 source code, etc. suitable for speech processing, previously used materials, basic available.
viabsp_v2[1].41_for_ce50
- Via Bsp Files 1 Driver
CSU-IDE-V2.2.4
- CSU-IDE V2.2.4 芯海SOC芯片开发软件-CSU-IDE V2.2.4
digital-clock
- 数字时钟，显示时分秒，按键操作调控时分秒-digital clock
FIR
- 用Verilog HDL实现FIR滤波器的功能，文件包括Verilog HDL的源代码。-Using Verilog HDL realize the FIR filter function, the file includes Verilog HDL source code.