资源列表
iar_ewarm_5[1].30(40)_full_keygen
- iar arm 5.30/5.40 full 破解文件,带破解详细过程,已测,能用-iar arm 5.30/5.40 full crack file, with detailed process of cracking have been measured, can be used
PAS6167_SPI_MT6223D_v3.5
- 原相PAS6167串行开发资料,适用天MTK6223D平台-Serial development phase PAS6167 original data, for days MTK6223D platform
MI360-Datasheet-V1.6
- Micron公司的 摄像头 芯片 MI360 手册-Micron camera chip MI360 datasheet
lab3-timer0_LED
- 第一个表示哪个定时器，第二个表示定时器频率，第三个表示定时器周期 值-The first one to show which timer, the second represents the timer frequency, the third represents the timer cycle value
DEC6416_USB
- SEED DEC 6416示例程序，板卡上USB接口芯片的功能展示-SEED DEC 6416 program，showing the usage of USB 2.0 interface
DaVinciEVM_Schematic
- DM6446 评估板原理图DaVinciEVM_Schematic-DM6446 evaluation board schematics
ex1_clkdiv
- 这个实验可以说是verilog入门最基础的实验了，我们不做太多的理论分析，实践是硬道理。 当CPLD的I/O（ FM）为低电平时，三极管导通， 蜂鸣器发声。-This experiment can be said to be the most basic experiments verilog entry, and we do not do a lot of theoretical analysis, practice is the last word. When the CPLD' s
s3c2410_rom_2
- ROM型的vxworksBSP包 编译测试通过
PWM-DAC
- 如何使用STM32F4的PWM来设计一个DAC。-How to design a PWM STM32F4 DAC.
CC2430
- 23个单片机基础实验程序包括：在PC用串口收数并发数，串口时钟PC显示，系统睡眠工作状态，系统唤醒，睡眠定时器的使用，定时唤醒，PWM控制灯亮度等-23 CC2430 MCU experimental procedures include: the PC with a serial number of concurrent collection number, the serial clock PC display, the system working state of sleep, syst
dgnszsz
- 多功能数字钟，在quartusII软件平台上实现的verilog源代码。大家试试看。-Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.
arm3000ADS1
- 博创科技arm3000开发板（arm7 44b0） 大量实验源代码 bootloader实验 ucos的移植 ucos的开发柜架 音频实验 电机控制 绘图的API函数 UDP通讯实验 LCD的驱动控制 触摸屏程序设计 系统的消息循环