资源列表
lab14-CAN
- DSPcan 通信 在自测试模式是、下可以直接测试 DSP28335-DSPcan communication in self-test mode, can directly test DSP28335
AT89S52_TC35I
- AT89S52控制基于TC35Igsm模块的短信发送C编的源程序.-AT89S52 control messages sent on TC35Igsm module source
Embedded Python System
- The Owl Embedded Python System is a free and open-source system for programming small 32-bit microcontrollers in Python. It is dramatically easier to use than other programming environments for microcontrollers, while still powerful enough to buil
shiboqi
- 基于stm32数字示波器 嵌入ucos操作系统 以及GUI显示界面-Based stm32 digital oscilloscope ucos embedded operating system and GUI display interface
MICRO-SD
- Code example for storing files in a micro-sd card from a PIC18f452 (CCS compiler)
dds正弦发生器代码
- 讲述了dds直接数字频率合成的基本原理,同时用VHDL语言编写dds原代码用于生成正弦波,并在ISE开发平台进行仿真和MATLAB验证正弦波输出结果-described dds direct digital frequency synthesis of the basic tenets addition to the use of VHDL prepared dds source used to produce sine, and ISE development platform for sim
line_follower_robot_circuit_8051
- this file is related 8051 based line follower robotic
SEEDVPM642_sobel_3
- 基于VPM642开发板的sobel边缘检测程序,经过存储优化。-VPM642 development board based on the segmentation edge detection procedure, through optimizing storage.
fourth-order-Runge-Kutta-method
- 关于ADIS16405的三轴陀螺姿态计算程序,用的是四阶龙格库塔法,单片机是STM32F103,对于ADIS16405的SPI采样是模拟方式,验证通过非常实用-About the ADIS16405 the axis gyro attitude calculation procedure, using a fourth order Runge-Kutta method,SCM is the STM32F103 analog mode, the sampling of for ADIS16405
cuiPLC
- 三菱PLC 天塔之光梯形图 本程序可以使天塔之光发出4种不同花样 同时包含启动\暂停和 连续\单步 通过实验系统测试可用!-Mitsubishi PLC days the light tower ladder program can make the day of the light tower to issue four different patterns that contain both start \ pause, and continuous \ single-step throug
02_How_to_use_SNDS100Board
- samsungs3c4510doc 是其开发板的使用手册,非常好-samsungs3c4510doc development board is the user manual is very good
LED
- 实现数码管的秒。分钟位显示。时钟1s调一次,下载到板子,通过验证了的verilog程序-To achieve digital control of the second. Minute digital display. 1s adjusted clock time, downloaded to the board, through the verilog program verified
