资源列表
Lab0603-MixerFIR
- dsp中的FIR编程，在CCS3.1编译环境中正常运行-The FIR dsp programming environment in CCS3.1 running compilation
dg128_ucosii
- 将ucos-ii 2.52移植到飞思卡尔的MC9S12DG128B芯片上，任务切换和时钟中断都已实现，非常好使。 仅供学习参考，不得用于商业用途。-ucos-ii s a port to 9s12dg128
cetvrtak13
- 8通道示波器，采用DE2-115FPGA综合，带有RS232连接，VGA驱动，IR驱动。用verilog编写。-8-channel oscilloscope, using DE2-115FPGA integrated with RS232 connection, VGA driver, IR driver. Written in verilog.
gates_1
- 利用FPGA制作各种逻辑门（与门、或门、非门等等）(Production of various types of logic gates using FPGA (gate, or gate, gate etc.))
TutorialSpartan3EBasys
- it is the file which is named as starting KIT for Spartan 3E
智能电表430程序V1.0
- MSP430开发项目，智能电表程序，测试OK(Development projects, smart meter programs)
Verilog黄金指南中文版
- FPGA教程，其中大量讲解了一些例程，可以很好的初步学习FPGA，好入门(FPGA tutorial, which explains a lot of routines, can be a good preliminary study FPGA, a good entry)
J1939forXS128
- 基于MC9S12XS128包含J1939的接收与发送程序.(A receiving and sending program based on MC9S12XS128 including J1939.)
P1L4kI
- A little something about arduino
STM32f103ZET6 (1)
- 是关于STM32的压缩文件，关于小车的C语言程序(It's a compressed file on STM32, the C language program for a car.)
Altera+OpenCL
- Altera的OpenCL主要面向信号处理类应用的客户，是用C语言开发FPGA的利器，开放计算语言(OpenCL)联盟著名的公司有FPGA巨头Altera、两大显卡GPU巨头AMD、英伟达、CPU巨头Intel、软件和服务器巨头IBM以及全世界最大的公司Apple（苹果）等等。不过AMD和英伟达是用GPU实现的OpenCL并行运算，Altera是用FPGA实现并行运算。(Altera's OpenCL is mainly a client for signal processing applic
Cheat Engine_ce修改器 V6.5 中文汉化版
- CE是一款内存修改器，可以实现一些游戏的内存修改，带有内核模式(CE is a memory modifier, which can realize memory modification of some games, with kernel mode)