资源列表
AteralIP.rar
- Altera IP核8B10B编码器的完整设计流程包括Altera IP的定制、仿真和实现的全过程,Altera IP core of the integrity of the 8B10B encoder design process, including the Altera IP customization, simulation and realization of the whole process of
lpc2368OK(ucos_ii)
- ucos-ii在LPC2368上的成功移植-ucos-ii
PWM
- 用VKDL语言编写的PWM控制程序很有用本例只做了5路PWM
T108DL-FM-Demo
- 用AR1000收音模块在Terawins的T108DL平台上做的程序，带256色OSD界面。LEIL-C开发环境-AR1000 radio module with the T108DL in Terawins platform to do the procedure, with 256 color OSD interface. LEIL-C development environment
vhdl_speedway_f07_9_2_2_0
- Introduction to VHDL about basic program-Introduction to VHDL about basic program..
luxiandeng4
- 基于硬盘序列号的软件保护技术的研究，硬盘序列号；注册码；共享软件；算法；客户端；服务器；RSA算法-hard disk serial-no； registered code；shared software；arithmetic；client；server；Arithmetic of RSA
345SMT32
- 一种STM32单片机驱动ADI公司的加速度传感器ADXL345的底层程序-One kind STM32 Microprocessor ADI' s ADXL345 accelerometer underlying process
demoXFmicroSD
- XF512的SD卡读写，飞思卡尔的板子,龙丘的板子哈-XF512 READ SD CARD, BORAD OF FREESCLAE, HCSXF512 CORE
test_vedio
- xilinx hdmi output yuv4:2:2 sd
CadenceWatch
- The design used in this tutorial is a hierarchical, HDL-based design. The top-level design file is an HDL file that references several other lower-level macros. The lower-level macros are either HDL modules or CORE Generator modules.
uCIPuCOS-II
- tcp/ip协议栈源码，用于源码开放的嵌入式实时操作系统uCOS－II。 -tcp/ip protocol stack source code for open-source embedded real-time operating system for uCOS--tcp/ip protocol stack source code for open-source embedded real-time operating system uCOS-II.-tcp/ip protocol stack
markpoint
- 主要讲了PCB设计中光学点的制作详细说明及应用的规范-About the PCB design of the main points of the production of optical details and application of norms