- fecgm 独立成份分析（ＩＣＡ）以及ｗｉｎｎｅｒ滤波 Source separation of complex signals with JADE. Jade performs `Source Separation in the following sense: X is an n x T data matrix assumed modelled as X = A S + N where o A is an unknown n x m matrix with full rank. o S is a m x T data matrix (source signals) with the properties a) for each t
- shuangsheqiu 双色球彩票选号工具. 全部是自己用vc6.0做的
- GPIO 过滤室自清洁控制软件
- FFT fft算法
- fktvt 采用热核构造权重
- Intro_Microwave remote sensing information is herewith enclosed for the readers.
资源列表
ADC
- 基于RedHat9.0的天祥2440开发板的光盘例程-Tienhsiang 2440 development board RedHat9.0-based CD-ROM routine
v60
- 基于TI TMSVC5416 DSP 的音乐播放器 可以实现曲目的切换、快进、回放、暂停等功能且界面友好-TI TMSVC5416 DSP-based music player can switch tracks, fast forward, rewind, pause and friendly interface
menji
- 基于TI tmsvc5416DSP处理器的门禁系统，有密码输入 身份验证 报警等功能-a alarm system based on TI TMSVC5416 DSP processor include ID checking and secret and so on
simple_dual_port_ram_single_clock
- Simple Dual-Port RAM with different read/write addresses but single read/write clock
single_port_ram
- Single port RAM with single read/write addre-Single port RAM with single read/write address
51
- 经典的51单片机常用模块 包含1602 12864 定时器长生占空比不同的波形 外部中断 各种LED效果灯等 -Classic 51 microcontroller used module contains 160212864 a different timer longevity duty cycle waveform external interrupt LED effect light
simple_dual_port_ram_dual_clock
- Simple Dual-Port RAM with different read/write addresses and different read/write clock
single_port_ram_with_init
- Single-port RAM with single read/write address and initial contents
true_dual_port_ram_dual_clock
- Quartus II VHDL Template True Dual-Port RAM with dual clock
MSP430f149
- 包含几乎全部MSP430f419 的模块程序 每一个都是自己亲自编程 都经过亲测 运行效果不错-Contains almost of all MSP430f419 module program is personally programmed through the good effect of pro-test run
true_dual_port_ram_single_clock
- Quartus II VHDL Template. True Dual-Port RAM with dual clock.
fifo
- fifo通用程序，可以作为模块化设计的通用程序-For fifo common procedures, modular design can be used as general-purpose program