资源列表
fpga-control
- fpga 对采集的数据进行控制的相关verilog语言编程代码-fpga for collection of data related to control programming code verilog
DS18B20
- DS18B20,1602显示时间，温度，有详细的注释，有仿真图-DS18B20, 1602 display the time, temperature, have detailed notes, a simulation diagram
Dynamic-display
- 点阵动态显示8个汉字，有仿真图，有源码，有详细的注释-Dot matrix display 8 Chinese characters, the dynamic simulation diagram, have a source code，a detailed notes，
Static-show-individual-character
- 16*16点阵，静态显示多个汉字，有仿真图-16* 16 dot matrix, static show multiple characters, a simulation diagram
VHDL
- VHDL下的自动售货机的源码和设计思路，希望给大家有一定的启发-VHDL source code under the vending machines and design ideas, want to give you a certain degree of inspiration
digital-clock
- 1602数字时钟，有仿真图，有源码，有文档-1602 digital clock, a simulation graph, source code, documentation
CDT-DL-451-91
- 电力自动化通讯规约，DL+451-91循环式远动规约-标准-Power automation communication protocols, DL/451-91 circulating far dynamic statute- standard
LCD12864A_430
- LCD12864示例代码，手把手教你学会LCD12864的使用-LCD12864 sample code, taught you how to learn to use LCD12864
cpld--abcount090418
- epm7128做的24位硬件计数器，频率根据cpld 的晶振决定上限。-epm7128 do 24-bit hardware counter, the oscillator frequency according to the decision cpld ceiling.
shizhong
- 单片机89S51控制6个数码管显示时，分，秒。其中，位码通过P0口的P0^0-P0^5 控制，段码通过74LS164的串入并出的移位寄存器来送出。-6 MCU 89S51 control digital display hours, minutes and seconds. Among them, the bit code through the P0 port P0 ^ 0-P0 ^ 5 control, the string section of code into and through
RA8835_Test
- 320X240液晶，控制器RA8835的C51测试代码。-320X240 LCD controller RA8835 the C51 test code.
Arm7_Verilog
- 基于Verilog的Arm7系统构建代码。-System Verilog for Arm7 based construction code.