资源列表
FIR_chanbing
- FIR滤波器的verilog HDL语言编写的，希望对大家有用-FIR filter verilog HDL languages, we hope to be useful
ads7818
- ADS7818 窜行AD的msp430的驱动源码。-ADS7818 AD channeling the msp430 driver line source.
CAN_CODE
- CAN CODE in verilog complete
ADC12
- msp430f14x的ADC12驱动库，应征通过的源码。-msp430f14x the ADC12 driver library, the applicant by the source.
UART
- UART (universal asynchronous receiver transmitter protocol) working verilog
SAP-processor-with-Test-Bench-working
- SAP processor in verilog with test bench complete and working
read-only
- 1. 修改了发送、接收文件的操作方式,改为先选择行，再操作。 2. 修改了图片的发送方式，图片消息也支持抄送了。 3. 增加了发送截屏图片的功能。 4. 修改了对话窗口设置字体的方式。 5. 修改对话窗口默认输入字号为12. 6. 修正了对话输入框为空时设置字体颜色无效的错误。 -1. To modify the sending and receiving file mode of operation, to first select line, and then ope
invaders_rel0300
- Space invadors for Spartan-3E
Helloworld
- Helloworld Programme in VHDL for SPartan-3E
ADS1.2
- ARM仿真器的学习资料，开发环境是ADS1.2，使用ADS编译，可以对MODEM进行编程-ARM emulator learning materials, the development environment is ADS1.2, compiled using the ADS can be programmed to the MODEM
W86L388D-Design
- 低端嵌入式系统中SD卡读写的实现.pdf-Low-end embedded system implementation of SD card reader. Pdf
pic16f76shili
- PIC16F76 各模块实例源代码，包括AD,IIC,SPI,RTC,中断，串口,定时器，LCD,甚至BootLoader-PIC16F76 source code examples of each module, including AD, IIC, SPI, RTC, interrupts, serial port, timer, LCD, or even BootLoader