资源列表
prathap
- a difficult technique compact programs in verilog-a difficult technique compact programs in verilog..
ad
- PIC24FJ256GA106控制ADS8361-PIC24FJ256GA106
hspice_cmdref
- its a complete refrence for hspice synopsys tool-its a complete refrence for hspice synopsys tool..
DE2_70_CAMERA_v1.0.2
- 應用程式verilog相關事件，參考文件-Verilog application related events, refer to documents ... etc.
AVR910_2313_v3_2
- AVR 下载器资料 c代码 原理图 制作过程说明-AVR programer c souce code
designcompiler
- its a descr iption collected to learn synopsys design compiler-its a descr iption collected to learn synopsys design compiler...
async_uart
- 用verilog写的串口接收发送通信程序，已经在cyclone EP1C12Q240C8调试通过-Serial receiver with verilog send written communication procedures, has been adopted in the cyclone EP1C12Q240C8 debugging
VerilogFPGAUSB
- 用Verilog（FPGA）实现USB源代码大家-Using Verilog (FPGA) source code we look to achieve USB
DC_ASSIGN
- counter clock vhdl file for useful to dc compilier
53607892SRAM_2
- SRM程序，好东西啊。都看看吧-SRM program, a good thing ah. Ha ha ha, look at it
17869318fpga-example1
- FPGA实例包含UARTverilog TLC7524接口电路程序 TLC5510 VHDL控制程序 DAC0832 接口电路程序 LCD控制VHDL程序与仿真等-FPGA interface circuit examples include UARTverilog TLC7524 TLC5510 VHDL process control procedures procedures DAC0832 LCD control interface circuit and simulation of V