资源列表
DDS_generation
- 基于Altera FPGA的DDS 模块 - DDS generation module based on Altera FPGA
signal_generation
- 信号发生模块 开发环境：keilC51 Quartus7.2-Signal Generation Module Development Environment: keilC51 Quartus7.2
celiang
- 在单片机上实现电阻，电容，电感的测量，本程序用C语言编程，易懂，可执行-In SCM to achieve resistance, capacitance, inductance measurement, the program uses C programming language, understandable and enforceable
AD_DA_Chip_test_program
- AD DA芯片测试程序 (开发环境keilC51+Quartus7.2)-AD DA Chip test program (Developmentenvironment： keilC51+Quartus7.2)
18B20
- 18B20+LED+控制二极管的亮灭，供温控系统设计者使用，已经在开发板上使用过，放心下载-18B20+ LED+ diode light off control for the temperature control system designer to use, has been used in the development board, secure download
80196MC
- 80c196mc的你变程序源代码！http://www.pudn.com-sffa
FFT_128_floating_point
- 基于Altera FPGA 的FFT128浮点运算模块(veriolg HDL+C51) (开发环境：KeilC51+Quartus7.2）-The module of 128 floating-point FFT based on Altera FPGA(veriolg HDL+C51) （Development environment：KeilC51+Quartus7.2）
VHDLcodes
- Behavioral descr iption of ALU, RAM MODULE, ROM MODULE, DIVIDE BY N COUNTER, GENERIC DIVIDER 2n+1, GCD CALCULATOR, GCD FSM CODE, JK FLIP FLOP in VHDL . These are fully synthesized codes with optimization.- Behavioral descr iption of ALU, RAM MODULE,
Vedio_FPGA
- 基于FPGA和SOPC的视频图像处理，视频编解码，系两篇硕士论文，其中一篇需要用CAJ阅读器打开-FPGA and SOPC based on video image processing, video codec, two master' s thesis, Department, of which a reader needs to open with CAJ
F02x_DACs_SineCosine
- c8051f02x产生正弦波的源码，精度很高-c8051f02x produce sine wave source, a high precision
81404600digitalclock
- 很强大的工具 希望大家可以喜欢 在生活中的应用-Very powerful tool for hope that we can enjoy the application in life
117143157digitalclock
- eda 工具的强大应用 希望大家可以喜欢他-eda tools, powerful applications like him hope that we can