资源列表
clk_divider
- Simple Clk Divider for FPGA design in Verilog -Simple Clk Divider for FPGA design in Verilog
wb_test
- 我在61ic公司开发的2812开发板2812EVM-II上开发的一些实验程序。包括LED，GPIO，SCI，KEY，PWM等-I have developed in the 61ic 2812 development board 2812EVM-II on the development of some experimental procedures. Including LED, GPIO, SCI, KEY, PWM, etc.
08-Multiplexers
- vhdl code for adder for quartus
jiaotongdeng
- 模拟交通灯控制，时间通过时钟控制，一般能达到很好的效果-Simulated traffic light control, time clock control by the general to achieve good results
shuziwenduji
- 基于DSP 的产生数字温度计应用功能 的源程序代码-Digital Thermometer Based on DSP applications the generation of source code
daojishi
- 用单片机控制的一个实时显示的倒计时显示表-Controlled by a real-time with a countdown display table display
shuzilvboqi
- 基于DSP 的产生数字滤波器应用功能 的源程序代码-DSP-based digital filter applications generate the source code
bujindianji
- 用单片机的控制的步进电机，可以通过改动一下，就能达到更好的效果 -MCU control with stepper motor, you can change what we can achieve better results
shuzifenjieyuhecheng
- 基于DSP 的数字信号的分解与合成 的源程序代码-DSP-based digital signal decomposition and composition of the source code
wenduji
- 单片机控室温度显示，简单的温度计。误差1度左右-SCM control room temperature display, a simple thermometer. Error of 1 degree Celsius
dsp6FIR
- 基于DSP5416的FIR滤波器设计实验，先用MATLAB产生冲击响应H（n),然后和输入数据进行卷积。-The FIR filter design based on DSP5416 experiment, the first impulse response generated using MATLAB H (n), then the input data and convolution.
dianzizhong
- 基于DSP 的产生电子钟应用功能 的源程序代码-DSP-based clock generation applications of the source code