资源列表
spwm
- SPWM和SVPWM模型 已经经过调试可用参数可设-SPWM and SVPWM model has been used to debug parameters can be set up
18B20
- 利用单片机C8051F020,芯片18B20测温程序。已经调通-The use of MCU C8051F020, chip 18B20 temperature program. Has been transferred Tong
s3c2416x_rev10
- 这是S3C2416开发板的DATASHEET。-This is a S3C2416 development board DATASHEET.
34
- 利用单片机和两个按键控制步进电机智能正反转-The use of microcontroller and two buttons control the stepper motor Intelligent positive inversion
x3cs400_uart
- 基于X3cS400的串口通讯程序,开发环境ISE7.0,使用verilog编写。可以使用串口调试助手在pc机上查看字符。-UART communication program based on X3CS400 FPGA, develop enviroment: ISE7.0,completed by verilog。 The result could be seen on the Uart debug assitant.
AD
- 基于ADC0809的数据采集系统,对0~5V电压采集,显示到数码管显示-ADC0809 based data acquisition system, for 0 ~ 5V voltage of the collection, display to the digital tube display
crc_ccit_8
- crc_ccit, 数据位宽为8,verilog编码-crc_ccit, datawidth is 8,coding by verilog
crc32_8
- crc32,数据位宽为8,verilog编码-crc32,datawidth is8,coding by verilog
iToday
- Windows Mobile today 程序-Windows Mobile today program
crc16_8
- crc16,数据位宽为8,verilog编码-crc16 ,datawidth is 8,coding by verilog
SEED503_mpeg2_loopback
- TMS320C6000,DSP6000系列DM642芯片,seed公司DM642开发板的MPEG2编解码的程序。-TMS320C6000, DSP6000 Series DM642 chip, seed company' s DM642 development board MPEG2 encoding and decoding process.
crc12_4
- 数据位宽为4,crc12,verilog编写-crc12 datawidth is 4,coding by verilog
