资源列表
convolve
- 基于TMS320F2812的卷积算法的实现-TMS320F2812-based Convolution Algorithm
FFT
- 基于TMS320F2812的FFT算法的实现-TMS320F2812-based implementation of the FFT algorithm
Iir
- 基于TMSF2812的iir滤波器算法的实现-TMSF2812 filter algorithm based on the realization of the iir
Fir
- 基于TMS320F2812的fir滤波器的算法实现-TMS320F2812-based algorithm for fir filter
control
- 用VHDL语言编写的一个控制程序，主要功能是输入码同步，输出字和帧信号-VHDL language using a control program, the main function is to input code synchronization, and frame signals output word
5502
- 实用电子钟,为六位数码管时钟程序直接使用,p3.2,p3.3,p3.4,p3.5 四键控制！实测24小时误差5秒。-Practical electronic clock, nixie tube clock for the six programs used directly, p3.2, p3.3, p3.4, p3.5 four key control! Measured 24-hour error of 5 seconds.
write_reg
- 用VHDL语言编写的写存储器程序，可下载在FPGA中使用-VHDL language used to write memory program can be downloaded in the FPGA using
count
- 用VHDL编写的4、7、40、64、84计数器，可将程序中的具体数字设成任意值。-Using VHDL written 4,7,40,64,84 counter, you can program specific figures set to any value.
dianti
- 更多功能，有文件直接弄到MAX++里运行-Verilog vhdl
VHDLdianti
- 电梯控制 记忆，上升下降停站 超载报警故障.....。-Verilog EDA dianti
Camera-Thesis
- USB CAMERA THESIS. VERY USEFUL
p_s
- 用VHDL语言编写的实现8位数据的并串转换，可下载在FPGA中-VHDL language with the realization of an 8-bit data, and the string conversion, can be downloaded in the FPGA in