资源列表
Audio_Out_Serializer
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
Audio_In_Deserializer
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
Audio_Bit_Counter
- The Audio Core interacts with the Audio CODEC (enCOder/DECoder) on the Altera DE2/DE1 Boards and provides an interface for audio input and outpu
vhdltest
- 自己设计的几个VHDL程序，包括译码器电路，多路开关，比较器应用，和16乘8RAM电路，各模块及最终的顶层原理图和引脚我都已给好，希望对大家的学习有所帮助-A few of their own design VHDL procedures, including the decoder circuit, multiple switches, comparator applications, and 16 by 8RAM circuit, each module and final top-leve
verilog_code
- 《Verilog HDL程序设计教程》程序源码(王金明)-" Verilog HDL Programming Tutorial" program source code (Wang Jinming)
seven_lcd
- 七段数码管显示的时钟程序VHDL代码 ISE编译环境-SEVEN seg VHDL ISE CLOCK
Automachine_project
- verilog 语言写的自动售货机程序，系IC课程设计代码，QUARTUS -verilog language written in a vending machine program, the Department of IC curriculum design code, QUARTUS II
counter
- 计算频率程序 ，VHDL代码Quters软件编写，-VHDL Quters
12456jgug
- 一个点阵16扫的C语言，程序 -A sweep of the C-lattice 16, the program
kjdfdfd
- 完全自创的一个用51单片机，写的12864的菜单程序代码，共同进步-Entirely self-created one with 51 microcontroller, a menu written in 12864 code, and common progress
qiangdaqi1
- 这是一个数电的4选手抢答器的设计报告 内容详细具体 请查收-This one of the few -- six players Responder Design Report details specific Check-This is one of four players to answer in a few electrical device designed to report detailed and specific please check-This is one of the
JF24C
- 本程序是利用51单片机模拟spi总线来实现jf24c无线收发模块之间的通信。 -This program is the use of microcontroller 51 to achieve the jf24c simulation spi bus communication between the wireless transceiver module.