资源列表
rs2322
- The duty cycle of the CLK0 output is 50-50 unless the DUTY_CYCLE_CORRECTION attribute is set to FALSE, in which case the duty cycle is the same as that of the CLKIN input. The duty cycle of the phase shifted outputs (CLK90, CLK180, and CLK270) is
DFNL
- On-chip synchronization is achieved by connecting the CLKFB input to a point on the global clock network driven by a BUFG, a global clock buffer. The BUFG connected to the CLKFB input of the DCM must be sourced from either the CLK0 or CLK2X out
wtut_vhd
- When the DLL_FREQUENCY_MODE attribute is set to High, the frequency of the clock signal at the CLKIN input must be in the High (DLL_CLKIN_MIN_HF to DLL_CLKIN_MAX_HF) frequency range (MHz). See The Programmable Logic Data Book for the current DL
wtut_ver
- DCM supports two frequency modes for the DLL. By default, the DLL_FREQUENCY_MODE attribute is set to Low and the frequency of the clock signal at the CLKIN input must be in the Low (DLL_CLKIN_MIN_LF to DLL_CLKIN_MAX_LF) frequency range (MHz). S
wtut_sc
- DCM includes a clock delay locked loop used to minimize clock skew for Spartan-3, Virtex-II, Virtex-II Pro, and Virtex-II Pro X devices. DCM synchronizes the clock signal at the feedback clock input (CLKFB) to the clock signal at the input clock
wtut_edif
- Xilinx clock. DIGITAL CLOCK for Spartan-3 Starter Board. This design shows how to generate a digital clock and display the output to the multiplexed 7- segment display in VHDL.
RS_decoder
- Reed solomon decoder based on table-lookup method VHDL code
VERILOG
- 一本很好的Verilog课件，通俗易懂简单明了适合初学者，给大家分享了~-A very good Verilog courseware, simple easy to understand for beginners, for everyone to share ~
IU3
- sun公司的sparc结构之整数处理器vhdl源码-The file is the RTL of the Sparc s integer unit.
LE-008
- 一个用单片机控制的恒流源程序跟源代码，加上设计说明包括一些设计思路跟计算方法。-failed to translate
WORM_TEMPERATURE
- 基于STM32的温度传感器例程，有源代码，适合初学者-STM32-based temperature sensor routines, source code, suitable for beginners
DM642_HelloMM
- DM642的视频处理算法的实现，其中有彩色空间的转化，彩带产生等试验代码。-DM642 video processing algorithms to achieve, including color space conversion, ribbon, etc. generated test code.