资源列表
SpreadShaping
- 直接序列扩频+成型滤波，将编码后数据进行256倍扩频，再按照4倍内插根升余弦成型滤波，最后成形滤波后按4路并行输出，以满足并行输入DA的要求。-Direct Sequence Spread Spectrum+ shaping filter, the encoded data 256 times more spread spectrum, and then interpolated according to four times the root raised cosine shaping fil
jiyuC51dejisuanqifangzhen
- 基于C51的计算器仿真，用Proteus完成，可以简单的按照装置改成硬件，已经通过硬件验证-Calculator-based C51 emulation, complete with Proteus can be a simple change in accordance with installation of hardware, has passed hardware verification
PD
- _Where The position in the target deque where the first element is inserted. _Val The value of the element being inserted into the deque. _Count
PROTEUS
- PROTEUS入门实例教程3--添加电池、可调电阻、电流、电压表让读者请动掌握使用方法-PROTEUS Getting Started Tutorial example 3- add batteries, adjustable resistance, current, voltage meter readers call up the master to use
c
- fdsf_Where The position in the target deque where the first element is inserted. _Val The value of the element being inserted into the deque. _Count -_Where The position in the target deque where the first element is inserted.
c51shukongdianyuandianlu
- 51系列单片机的程序仿真实例，c51电源数控电路.rar-51 Series MCU process simulation examples, c51 power CNC circuit. Rar
RF650radio
- is an example of how to interface RF650 to a Atmel 2051 microcontroller. reciever and transmitter included along with the datasheet and pin outs and interface diagram. By Dr. Salman Afghani.
ourdev_376574
- 本程序用两个meag16单片机为核心，实现两路信息之间的交流，用Protues7.4仿真以后，实现了功能的要求-This procedure with two meag16 MCU as the core, to achieve two-way information exchanges between the simulation with Protues7.4 after achieving the functional requirements of
MyMedia
- 本系统采用mega16单片机为核心，以LCD为显示对象，实现了一个简单的铃声制作过程-The system uses mega16 microcontroller as the core, to LCD to display the object to achieve a simple ring manufacturing process
duolutongxun
- 本同心采用Protues7.4对电路进行仿真，能实现各路之间的信息交流，系统出以良好状态-The concentric with Protues7.4 right circuit simulation, to achieve the exchange of information between separate ways, the system up to good condition
VHDL
- VHDL的语言要素-VHDL的语言要素
EDA
- 利用 VHDL 设计的许多实用逻辑系统中，有许多是可以利用有限状态机的设计方案来 描述和实现的。无论与基于VHDL 的其它设计方案相比，还是与可完成相似功能的CPU相 比，状态机都有其难以逾越的优越性，它主要表现在以下几方面： h由于状态机的结构模式相对简单，设计方案相对固定，特别是可以定义符号化枚举 类型的状态，这一切都为 VHDL 综合器尽可能发挥其强大的优化功能提供了有利条件。而 且，性能良好的综合器都具备许多可控或不可控的专门