- outsfengesuanfa 有关图像处理方面的
- atmega16CAN 本程序采用atmega16单片机成功实现CAN通信
- EXTINT 是U龙开发板中
- SOURCE n order to solve the Traveling Salesman Problem (TSP) through Genetic Algorithms (GAs)
- IEC_RMS_V0 This simple module calculate the RMS value of an input signal (also measured)by using the deffined equation in the IEC norm
- vad 读入bluesky.wav数据
资源列表
ftpdlib
- vxWorks下ftp源代码-The source code of ftp in VxWorks.
broadcastSend
- 在VxWorks下面通过网络传送数据的例程-VxWorks below the transmission of data through the network of routines
spi
- spi协议的驱动程序源代码-20 agreements driver source code
8019
- 一个8019网卡驱动程序-A device driver for 8019 Ethernet card
romfs0930.tar
- uclinux文件系统for s3c44b0-Basis file system for s3c44b0
blob040928.tar
- uclinux启动代码for s3c44b0-Basis boot code for s3c44b0
电梯控制电路
- 电梯控制电路，用verilog写-elevator control circuit used to write Verilog
微处理机接口电路设计
- 微处理机接口电路设计，用verilog写-microprocessor interface circuit design, writing Verilog
16-bit数的偶数奇偶校验
- 16-bit数的偶数奇偶校验及阶乘运算，用verilog写-16-bit number of even parity and factorial computation, written using Verilog
存储器模型及测试台
- 512x8存储器模型,及其测试台，用verilog写-512x8 memory model, and the tester, using Verilog write
latch
- 门拴电路,4位选择器，alu,用verilog写的。-doors Shuan circuit, four selectors, ALU, with Verilog writes.
start
- 在伟福环境下修改 Startup.a51 init.a51 以改变系统初始化过程-in Wai Fu environment changes Startup.a51 init.a51 to change the system initialization process