资源列表
HDL_equation
- Verilog Program to implement the function f=x+yz and Testbench for all the possible inputs using For Loop
4bit_moore
- Moore machine is state machine whose output is a function of only the current state.
4bit_mealy
- Mealy machine is a state machine whose output is determined by the current state and the current inputs.
ADC_SA_8bit
- the successive approximation part of the circuit. trial_root is loaded with value 8'b1000_0000 on the rising egde that makes count = 3'b000.
PWN
- Pulse Width modulation using Verilog HDL
FP_multiplier
- Multiplier for 32 bit with test bench using verilog HDL
FP_divider
- floating point divider for 32 bit with test bench
FP_adder
- 32 bit floating point adder with testbench
平衡小车
- 此文件为 平衡小车的原理图+源码！介绍清晰，方便可用。推荐下载(This file is the principle diagram of balanced car + source code!The introduction is clear and easy to use.Recommended download)
SN7474
- 74LS74芯片行为级代码，实现了双D触发器与逻辑延迟，可利用modelsim仿真(74LS74 chip behavior level code)
机器人代码
- 使用蓝牙控制机器人 1.乐幻索尔舵机控制板 2.hc-05蓝牙模块(Using Bluetooth control robot)
main
- usb转3路uart，使用stm32单片机(USB to 3 UART use with stm32.)