资源列表
Dot
- 基于msp430f249的proteus点阵仿真程序，带原理图-the msp430f249 proteus simulation dot,including design
ddr3_demo_verilog
- 基于Verilog HDL的ddr3控制器，适用于lattice的ECP3系列-ddr3 controller based on Verilog HDL，used in lattice ECP3 serial FPGA
digital--clock
- 数字时钟，数码管显示时分秒，键盘可调节时分秒的值-Digital clock, the value of every minute of minutes and seconds, the keyboard can be adjusted when the digital display
static-I
- 恒流电子负载，运用DA可控恒流值，步进10毫安，范围100毫安至1安，并用AD采样，送入LCD显示-Constant current electronic load, using DA controlled current value, step 10 mA, 100 mA range to 1 A, and with AD sampling, into the LCD display
digital-control-U
- 可调节数控稳压电源，步进100毫伏，LCD显示电压值-NC adjustable power supply, stepper 100 mV, LCD display voltage value
frequency-test
- 使用51定时器中断 采用测频法 测量频率 并使用LCD1602显示-Use 51 timer interrupt frequency measurement method using the measurement frequency and use LCD1602 display
AD
- AD0804的配置和使用，测电位，并转化为数字量在LCD1602上显示-Configure and use AD0804, the measured potential, and converted to digital display on the LCD1602
armfly-DSP-tutorials-Chapter-40
- 本教程使用的DSP库来自ARM官方，此库支持以CM0，CM3，CM4以及CM7为内核的所有MCU。本章节讲解IIR滤波器直接I型的低通，高通，带通和带阻滤波器的实现。-This tutorial uses a DSP library the ARM official, this library supports CM0, CM3, CM4 and CM7 for the kernel of all MCU.
dingshiqi
- 定时器，上电开始计时，LED每秒闪一次，9小时后继电器吸合3秒，然后释放，计时器重新计时。如此循环。-#include reg51.h typedef unsigned char BYTE typedef unsigned int WORD #define SYSclk 6000000L #define MODE1T //Timer clock mode, commendt this line is 12T mode, uncomment is 1T
STM32F4x7_ETH_LwIP_V1.1.0
- 基于stm32+lwip+enc28j60的tcp通信实验-simple tcp commmunication examplebased on stm32+lwip+enc28j60
REGISTER
- DSP通过EMIF接口访问FPGA内部寄存器（FD6713开发板）-DSP access the internal registers in FPGA via EMIF interface (FD6713 Development Board)
FD6713-Users-ManualV1.6
- FD6713开发板的用户手册，记录了多个例程的操作方法及简单原理-FD6713 development board user manual recording method of operating a plurality of routines and the simple principle