资源列表
uart_server
- 24路串口转1路串口服务程序, 包括FIFO模块，串口接收，发送模块，定时器模块，检测控制模块等。采用Verilog编写-24 way serial ports to 1 serial port, including FIFO module,RX module,TX module, timer module, detection and control module, etc.. Verilog preparation
FFT_n4
- FFT n point 4096 1024 -FFT n point 4096 1024 ...
Verilog
- FPGA开发板资料Verilog，53个例程-fpga Development board materia
VHDL
- FPGA 开发板资料VHDL，53个例程-FPGA demoboard material
SSD1963_drive
- SSD1936液晶芯片的驱动程序， 采用C语言编程，包含初始化，字符显示等函数-SSD1936 LCD driver
BCD_to_7_seg_decoder
- BCD to 7 segments display decoder
fpga-verilog-my_uart
- FPGA串口通信，另一种方法，总共用了三种方法，请点击用户名查看，总有你满意的-FPGA Serial communication
buffer_tri_state
- Buffer tristate in vhdl
uartverilog
- FPGA串口通信-来自小梅哥，能快速发送，超长发送没有误码-FPGA Serial communication
clk_div
- Clock divider in VHDL.
Serial
- FPGA 串口通信方法1 亲测能用，来自小桥流水的博客-FPGA Serial communication http://blog.sina.com.cn/s/blog_52e8baa40100saen.html
digi_clk
- Digital watch in VHDL.