资源列表
fuzzyPID
- fuzzy pid control motor
EEPROM
- 本案例代码为单片机内部EEPROM的源代码程序，如有需要的朋友尽管拿去-This example code for the microcontroller block internal EEPROM source code program, if necessary take friend to!!!!!
JING-MI-06-JU-CHENGXU
- 本代码为精密06锯上切割双锯角码程序，已成功试机。无需解释-The code for cutting angle saw double-precision 06 saw procedural code has been successfully test machine. Without explanation! ! !
LCD12864
- 本案例代码为LCD12864液晶程序，代码讲解详细，驱动解释明了，希望可以帮助到爱好者们学习。-This case LCD12864 LCD program code, the code to explain in detail, driving clear explanation, I hope to help the fans to learn.
Double-machine-communication
- 本案例代码为单片机双极通讯，也可以衍生为多级通讯。另附有仿真，希望可以帮助到有需要的朋友。-In this case the code for the microcontroller bipolar communications, can also be derived for multi-level communication. There simulation attached, hope to help a friend in need.
LED---74hc164
- 本代码为74hc164扩展IO口来点亮双色LED灯，LED交叉点亮，反转色彩。希望可以帮助到爱好者或初学者了解单片机语言以及熟练使用74hc164来扩展IO口；-The code for the 74hc164 expansion IO port to light color LED lights, LED lights cross, inverted colors. I hope to help the enthusiast or a beginner learn the language a
fir_noRom
- 有VHDL实现对复杂信号的16位fir滤波器-desgin the 16 bits FIR Filter by VHDL
data_switch
- verilog 实现15bit数据与176bit数据间的相互转换，可根据此代码作一定的修改，可以实现其他位宽数据的转换-verilog to achieve mutual conversion between 15bit data with 176bit data can make certain changes based on this code, you can achieve the conversion of other bit-wide data
AD80305
- 一种基于xilinx FPGA S6,verilog 实现AD80305输入输出接口配置，可参考-Based xilinx FPGA S6, verilog realize AD80305 input and output interface configuration, refer to
AD9362
- 一种基于xilinx S6，verilog语言，实现AD9362,IDDR ODDR接口的设计，已经过实际测试-Based xilinx S6, verilog language, achieve AD9362, design IDDR ODDR interface, has been the actual test
SPI
- 一种基于FPGA，Verilog语言的SPI总线实现方式，顶层添加自己想要传输的内容到相应的地址就行，百分百可以。-Based FPGA, SPI bus implementations Verilog language, the top add your own content you want to transfer to the appropriate address on the line, can be hundred percent.
STM32_FLASH_read_write
- STM32内部FLASH读写程序功能。 -STM32 FLASH Read,Write.